Commit b604d497 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Thomas Bogendoerfer

MIPS: remove cpu_has_64bit_addresses

This macro is identical to CONFIG_64BIT, and using a Kconfig variable
for the only places that checks them (the ioremap implementation) will
simplify later patches in this series.
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent acfaaf52
...@@ -435,9 +435,6 @@ ...@@ -435,9 +435,6 @@
# ifndef cpu_has_64bit_gp_regs # ifndef cpu_has_64bit_gp_regs
# define cpu_has_64bit_gp_regs 0 # define cpu_has_64bit_gp_regs 0
# endif # endif
# ifndef cpu_has_64bit_addresses
# define cpu_has_64bit_addresses 0
# endif
# ifndef cpu_vmbits # ifndef cpu_vmbits
# define cpu_vmbits 31 # define cpu_vmbits 31
# endif # endif
...@@ -456,9 +453,6 @@ ...@@ -456,9 +453,6 @@
# ifndef cpu_has_64bit_gp_regs # ifndef cpu_has_64bit_gp_regs
# define cpu_has_64bit_gp_regs 1 # define cpu_has_64bit_gp_regs 1
# endif # endif
# ifndef cpu_has_64bit_addresses
# define cpu_has_64bit_addresses 1
# endif
# ifndef cpu_vmbits # ifndef cpu_vmbits
# define cpu_vmbits cpu_data[0].vmbits # define cpu_vmbits cpu_data[0].vmbits
# define __NEED_VMBITS_PROBE # define __NEED_VMBITS_PROBE
......
...@@ -166,7 +166,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si ...@@ -166,7 +166,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
#define __IS_LOW512(addr) (!((phys_addr_t)(addr) & (phys_addr_t) ~0x1fffffffULL)) #define __IS_LOW512(addr) (!((phys_addr_t)(addr) & (phys_addr_t) ~0x1fffffffULL))
if (cpu_has_64bit_addresses) { if (IS_ENABLED(CONFIG_64BIT)) {
u64 base = UNCAC_BASE; u64 base = UNCAC_BASE;
/* /*
...@@ -275,7 +275,7 @@ static inline void iounmap(const volatile void __iomem *addr) ...@@ -275,7 +275,7 @@ static inline void iounmap(const volatile void __iomem *addr)
#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) #define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
if (cpu_has_64bit_addresses || if (IS_ENABLED(CONFIG_64BIT) ||
(__builtin_constant_p(addr) && __IS_KSEG1(addr))) (__builtin_constant_p(addr) && __IS_KSEG1(addr)))
return; return;
......
...@@ -56,6 +56,5 @@ ...@@ -56,6 +56,5 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */ #endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */
...@@ -45,7 +45,6 @@ ...@@ -45,7 +45,6 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32 #define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32 #define cpu_icache_line_size() 32
......
...@@ -46,7 +46,6 @@ ...@@ -46,7 +46,6 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32 #define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32 #define cpu_icache_line_size() 32
......
...@@ -45,7 +45,6 @@ ...@@ -45,7 +45,6 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32 #define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32 #define cpu_icache_line_size() 32
......
...@@ -46,7 +46,6 @@ ...@@ -46,7 +46,6 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32 #define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32 #define cpu_icache_line_size() 32
......
...@@ -44,7 +44,6 @@ ...@@ -44,7 +44,6 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 16 #define cpu_dcache_line_size() 16
#define cpu_icache_line_size() 16 #define cpu_icache_line_size() 16
......
...@@ -44,7 +44,6 @@ ...@@ -44,7 +44,6 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32 #define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32 #define cpu_icache_line_size() 32
......
...@@ -43,7 +43,6 @@ ...@@ -43,7 +43,6 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32 #define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32 #define cpu_icache_line_size() 32
......
...@@ -54,7 +54,6 @@ ...@@ -54,7 +54,6 @@
#define cpu_has_64bits 0 #define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0 #define cpu_has_64bit_zero_reg 0
#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_gp_regs 0
#define cpu_has_64bit_addresses 0
#define cpu_has_inclusive_pcaches 0 #define cpu_has_inclusive_pcaches 0
......
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