Merge tag 'arm-soc/for-4.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into next/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 4.20, please pull the following:

- Stefan provides a reference to the Compute Module IO Board V3 such
  that we can reference the arm counterpart and still build it for arm64

- Rob fixes I2C and SPI bus warnings which are going to show up with his
  update to DTC scheduled for 4.20

* tag 'arm-soc/for-4.20/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: Fix I2C and SPI bus warnings
  arm64: dts: broadcom: Add reference to Compute Module IO Board V3
Signed-off-by: Olof Johansson <olof@lixom.net>

arch/arm64/boot/dts/broadcom/Makefile

 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb \
-			      bcm2837-rpi-3-b-plus.dtb
+			      bcm2837-rpi-3-b-plus.dtb \
+			      bcm2837-rpi-cm3-io3.dts
 
 subdir-y	+= northstar2
 subdir-y	+= stingray

arch/arm64/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts

+// SPDX-License-Identifier: GPL-2.0
+#include "arm/bcm2837-rpi-cm3-io3.dts"

arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi

@@ -639,7 +639,7 @@ uart3: serial@66130000 {
 			status = "disabled";
 		};
 
-		ssp0: ssp@66180000 {
+		ssp0: spi@66180000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <0x66180000 0x1000>;
 			interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
@@ -650,7 +650,7 @@ ssp0: ssp@66180000 {
 			status = "disabled";
 		};
 
-		ssp1: ssp@66190000 {
+		ssp1: spi@66190000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <0x66190000 0x1000>;
 			interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;

arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi

@@ -138,7 +138,7 @@ pca9505: pca9505@20 {
 &i2c1 {
 	status = "okay";
 
-	pcf8574: pcf8574@20 {
+	pcf8574: pcf8574@27 {
 		compatible = "nxp,pcf8574a";
 		gpio-controller;
 		#gpio-cells = <2>;

arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi

@@ -521,7 +521,7 @@ uart3: uart@130000 {
 			status = "disabled";
 		};
 
-		ssp0: ssp@180000 {
+		ssp0: spi@180000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <0x00180000 0x1000>;
 			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
@@ -533,7 +533,7 @@ ssp0: ssp@180000 {
 			status = "disabled";
 		};
 
-		ssp1: ssp@190000 {
+		ssp1: spi@190000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <0x00190000 0x1000>;
 			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;