Commit b959b978 authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer

MIPS: SNI: Fix spurious interrupts

On A20R machines the interrupt pending bits in cause register need to be
updated by requesting the chipset to do it. This needs to be done to
find the interrupt cause and after interrupt service. In
commit 0b888c7f ("MIPS: SNI: Convert to new irq_chip functions") the
function to do after service update got lost, which caused spurious
interrupts.

Fixes: 0b888c7f ("MIPS: SNI: Convert to new irq_chip functions")
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent 564c836f
...@@ -143,7 +143,10 @@ static struct platform_device sc26xx_pdev = { ...@@ -143,7 +143,10 @@ static struct platform_device sc26xx_pdev = {
}, },
}; };
static u32 a20r_ack_hwint(void) /*
* Trigger chipset to update CPU's CAUSE IP field
*/
static u32 a20r_update_cause_ip(void)
{ {
u32 status = read_c0_status(); u32 status = read_c0_status();
...@@ -205,12 +208,14 @@ static void a20r_hwint(void) ...@@ -205,12 +208,14 @@ static void a20r_hwint(void)
int irq; int irq;
clear_c0_status(IE_IRQ0); clear_c0_status(IE_IRQ0);
status = a20r_ack_hwint(); status = a20r_update_cause_ip();
cause = read_c0_cause(); cause = read_c0_cause();
irq = ffs(((cause & status) >> 8) & 0xf8); irq = ffs(((cause & status) >> 8) & 0xf8);
if (likely(irq > 0)) if (likely(irq > 0))
do_IRQ(SNI_A20R_IRQ_BASE + irq - 1); do_IRQ(SNI_A20R_IRQ_BASE + irq - 1);
a20r_update_cause_ip();
set_c0_status(IE_IRQ0); set_c0_status(IE_IRQ0);
} }
......
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