Commit b99b9ec1 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Clean up cursor defines

Use MCURSOR_ instead of CURSOR_ as the prefix for the non-845/865
cursor defines consistently, and move the pipe CSC enable bit next
to the other non-845/865 cursor defines.

v2: Take care of gvt uses as well
v3: Another gvt use popped up
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180131143709.875-1-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com> #v2
parent eade6c89
...@@ -273,8 +273,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) ...@@ -273,8 +273,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
for_each_pipe(dev_priv, pipe) { for_each_pipe(dev_priv, pipe) {
vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE; vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE;
vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~CURSOR_MODE; vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE;
vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= CURSOR_MODE_DISABLE; vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE;
} }
vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE; vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE;
......
...@@ -300,16 +300,16 @@ static int cursor_mode_to_drm(int mode) ...@@ -300,16 +300,16 @@ static int cursor_mode_to_drm(int mode)
int cursor_pixel_formats_index = 4; int cursor_pixel_formats_index = 4;
switch (mode) { switch (mode) {
case CURSOR_MODE_128_ARGB_AX: case MCURSOR_MODE_128_ARGB_AX:
cursor_pixel_formats_index = 0; cursor_pixel_formats_index = 0;
break; break;
case CURSOR_MODE_256_ARGB_AX: case MCURSOR_MODE_256_ARGB_AX:
cursor_pixel_formats_index = 1; cursor_pixel_formats_index = 1;
break; break;
case CURSOR_MODE_64_ARGB_AX: case MCURSOR_MODE_64_ARGB_AX:
cursor_pixel_formats_index = 2; cursor_pixel_formats_index = 2;
break; break;
case CURSOR_MODE_64_32B_AX: case MCURSOR_MODE_64_32B_AX:
cursor_pixel_formats_index = 3; cursor_pixel_formats_index = 3;
break; break;
...@@ -342,8 +342,8 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, ...@@ -342,8 +342,8 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
return -ENODEV; return -ENODEV;
val = vgpu_vreg_t(vgpu, CURCNTR(pipe)); val = vgpu_vreg_t(vgpu, CURCNTR(pipe));
mode = val & CURSOR_MODE; mode = val & MCURSOR_MODE;
plane->enabled = (mode != CURSOR_MODE_DISABLE); plane->enabled = (mode != MCURSOR_MODE_DISABLE);
if (!plane->enabled) if (!plane->enabled)
return -ENODEV; return -ENODEV;
......
...@@ -5919,7 +5919,6 @@ enum { ...@@ -5919,7 +5919,6 @@ enum {
#define CURSOR_GAMMA_ENABLE 0x40000000 #define CURSOR_GAMMA_ENABLE 0x40000000
#define CURSOR_STRIDE_SHIFT 28 #define CURSOR_STRIDE_SHIFT 28
#define CURSOR_STRIDE(x) ((ffs(x)-9) << CURSOR_STRIDE_SHIFT) /* 256,512,1k,2k */ #define CURSOR_STRIDE(x) ((ffs(x)-9) << CURSOR_STRIDE_SHIFT) /* 256,512,1k,2k */
#define CURSOR_PIPE_CSC_ENABLE (1<<24)
#define CURSOR_FORMAT_SHIFT 24 #define CURSOR_FORMAT_SHIFT 24
#define CURSOR_FORMAT_MASK (0x07 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_MASK (0x07 << CURSOR_FORMAT_SHIFT)
#define CURSOR_FORMAT_2C (0x00 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_2C (0x00 << CURSOR_FORMAT_SHIFT)
...@@ -5928,20 +5927,21 @@ enum { ...@@ -5928,20 +5927,21 @@ enum {
#define CURSOR_FORMAT_ARGB (0x04 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_ARGB (0x04 << CURSOR_FORMAT_SHIFT)
#define CURSOR_FORMAT_XRGB (0x05 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_XRGB (0x05 << CURSOR_FORMAT_SHIFT)
/* New style CUR*CNTR flags */ /* New style CUR*CNTR flags */
#define CURSOR_MODE 0x27 #define MCURSOR_MODE 0x27
#define CURSOR_MODE_DISABLE 0x00 #define MCURSOR_MODE_DISABLE 0x00
#define CURSOR_MODE_128_32B_AX 0x02 #define MCURSOR_MODE_128_32B_AX 0x02
#define CURSOR_MODE_256_32B_AX 0x03 #define MCURSOR_MODE_256_32B_AX 0x03
#define CURSOR_MODE_64_32B_AX 0x07 #define MCURSOR_MODE_64_32B_AX 0x07
#define CURSOR_MODE_128_ARGB_AX ((1 << 5) | CURSOR_MODE_128_32B_AX) #define MCURSOR_MODE_128_ARGB_AX ((1 << 5) | MCURSOR_MODE_128_32B_AX)
#define CURSOR_MODE_256_ARGB_AX ((1 << 5) | CURSOR_MODE_256_32B_AX) #define MCURSOR_MODE_256_ARGB_AX ((1 << 5) | MCURSOR_MODE_256_32B_AX)
#define CURSOR_MODE_64_ARGB_AX ((1 << 5) | CURSOR_MODE_64_32B_AX) #define MCURSOR_MODE_64_ARGB_AX ((1 << 5) | MCURSOR_MODE_64_32B_AX)
#define MCURSOR_PIPE_SELECT_MASK (0x3 << 28) #define MCURSOR_PIPE_SELECT_MASK (0x3 << 28)
#define MCURSOR_PIPE_SELECT_SHIFT 28 #define MCURSOR_PIPE_SELECT_SHIFT 28
#define MCURSOR_PIPE_SELECT(pipe) ((pipe) << 28) #define MCURSOR_PIPE_SELECT(pipe) ((pipe) << 28)
#define MCURSOR_GAMMA_ENABLE (1 << 26) #define MCURSOR_GAMMA_ENABLE (1 << 26)
#define CURSOR_ROTATE_180 (1<<15) #define MCURSOR_PIPE_CSC_ENABLE (1<<24)
#define CURSOR_TRICKLE_FEED_DISABLE (1 << 14) #define MCURSOR_ROTATE_180 (1<<15)
#define MCURSOR_TRICKLE_FEED_DISABLE (1 << 14)
#define _CURABASE 0x70084 #define _CURABASE 0x70084
#define _CURAPOS 0x70088 #define _CURAPOS 0x70088
#define CURSOR_POS_MASK 0x007FF #define CURSOR_POS_MASK 0x007FF
......
...@@ -9715,7 +9715,7 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state, ...@@ -9715,7 +9715,7 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
cntl |= MCURSOR_GAMMA_ENABLE; cntl |= MCURSOR_GAMMA_ENABLE;
if (HAS_DDI(dev_priv)) if (HAS_DDI(dev_priv))
cntl |= CURSOR_PIPE_CSC_ENABLE; cntl |= MCURSOR_PIPE_CSC_ENABLE;
} }
if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv))
...@@ -9723,13 +9723,13 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state, ...@@ -9723,13 +9723,13 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
switch (plane_state->base.crtc_w) { switch (plane_state->base.crtc_w) {
case 64: case 64:
cntl |= CURSOR_MODE_64_ARGB_AX; cntl |= MCURSOR_MODE_64_ARGB_AX;
break; break;
case 128: case 128:
cntl |= CURSOR_MODE_128_ARGB_AX; cntl |= MCURSOR_MODE_128_ARGB_AX;
break; break;
case 256: case 256:
cntl |= CURSOR_MODE_256_ARGB_AX; cntl |= MCURSOR_MODE_256_ARGB_AX;
break; break;
default: default:
MISSING_CASE(plane_state->base.crtc_w); MISSING_CASE(plane_state->base.crtc_w);
...@@ -9737,7 +9737,7 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state, ...@@ -9737,7 +9737,7 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
} }
if (plane_state->base.rotation & DRM_MODE_ROTATE_180) if (plane_state->base.rotation & DRM_MODE_ROTATE_180)
cntl |= CURSOR_ROTATE_180; cntl |= MCURSOR_ROTATE_180;
return cntl; return cntl;
} }
...@@ -9918,7 +9918,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane, ...@@ -9918,7 +9918,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
val = I915_READ(CURCNTR(plane->pipe)); val = I915_READ(CURCNTR(plane->pipe));
ret = val & CURSOR_MODE; ret = val & MCURSOR_MODE;
if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
*pipe = plane->pipe; *pipe = plane->pipe;
...@@ -15100,8 +15100,8 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe) ...@@ -15100,8 +15100,8 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
WARN_ON(I915_READ(DSPCNTR(PLANE_A)) & DISPLAY_PLANE_ENABLE); WARN_ON(I915_READ(DSPCNTR(PLANE_A)) & DISPLAY_PLANE_ENABLE);
WARN_ON(I915_READ(DSPCNTR(PLANE_B)) & DISPLAY_PLANE_ENABLE); WARN_ON(I915_READ(DSPCNTR(PLANE_B)) & DISPLAY_PLANE_ENABLE);
WARN_ON(I915_READ(DSPCNTR(PLANE_C)) & DISPLAY_PLANE_ENABLE); WARN_ON(I915_READ(DSPCNTR(PLANE_C)) & DISPLAY_PLANE_ENABLE);
WARN_ON(I915_READ(CURCNTR(PIPE_A)) & CURSOR_MODE); WARN_ON(I915_READ(CURCNTR(PIPE_A)) & MCURSOR_MODE);
WARN_ON(I915_READ(CURCNTR(PIPE_B)) & CURSOR_MODE); WARN_ON(I915_READ(CURCNTR(PIPE_B)) & MCURSOR_MODE);
I915_WRITE(PIPECONF(pipe), 0); I915_WRITE(PIPECONF(pipe), 0);
POSTING_READ(PIPECONF(pipe)); POSTING_READ(PIPECONF(pipe));
......
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