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linux
Commits
bab7cc18
Commit
bab7cc18
authored
May 24, 2016
by
Ben Skeggs
Browse files
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drm/nouveau: pass nvif_client to nouveau_bo_new() instead of drm_device
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
d2ee3605
Changes
10
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Showing
10 changed files
with
20 additions
and
15 deletions
+20
-15
drivers/gpu/drm/nouveau/dispnv04/crtc.c
drivers/gpu/drm/nouveau/dispnv04/crtc.c
+3
-2
drivers/gpu/drm/nouveau/nouveau_bo.c
drivers/gpu/drm/nouveau/nouveau_bo.c
+3
-2
drivers/gpu/drm/nouveau/nouveau_bo.h
drivers/gpu/drm/nouveau/nouveau_bo.h
+3
-1
drivers/gpu/drm/nouveau/nouveau_chan.c
drivers/gpu/drm/nouveau/nouveau_chan.c
+1
-1
drivers/gpu/drm/nouveau/nouveau_gem.c
drivers/gpu/drm/nouveau/nouveau_gem.c
+1
-1
drivers/gpu/drm/nouveau/nouveau_prime.c
drivers/gpu/drm/nouveau/nouveau_prime.c
+2
-1
drivers/gpu/drm/nouveau/nv17_fence.c
drivers/gpu/drm/nouveau/nv17_fence.c
+1
-1
drivers/gpu/drm/nouveau/nv50_display.c
drivers/gpu/drm/nouveau/nv50_display.c
+2
-2
drivers/gpu/drm/nouveau/nv50_fence.c
drivers/gpu/drm/nouveau/nv50_fence.c
+1
-1
drivers/gpu/drm/nouveau/nv84_fence.c
drivers/gpu/drm/nouveau/nv84_fence.c
+3
-3
No files found.
drivers/gpu/drm/nouveau/dispnv04/crtc.c
View file @
bab7cc18
...
...
@@ -1124,8 +1124,9 @@ nv04_crtc_create(struct drm_device *dev, int crtc_num)
drm_crtc_helper_add
(
&
nv_crtc
->
base
,
&
nv04_crtc_helper_funcs
);
drm_mode_crtc_set_gamma_size
(
&
nv_crtc
->
base
,
256
);
ret
=
nouveau_bo_new
(
dev
,
64
*
64
*
4
,
0x100
,
TTM_PL_FLAG_VRAM
,
0
,
0x0000
,
NULL
,
NULL
,
&
nv_crtc
->
cursor
.
nvbo
);
ret
=
nouveau_bo_new
(
&
nouveau_drm
(
dev
)
->
client
,
64
*
64
*
4
,
0x100
,
TTM_PL_FLAG_VRAM
,
0
,
0x0000
,
NULL
,
NULL
,
&
nv_crtc
->
cursor
.
nvbo
);
if
(
!
ret
)
{
ret
=
nouveau_bo_pin
(
nv_crtc
->
cursor
.
nvbo
,
TTM_PL_FLAG_VRAM
,
false
);
if
(
!
ret
)
{
...
...
drivers/gpu/drm/nouveau/nouveau_bo.c
View file @
bab7cc18
...
...
@@ -174,12 +174,12 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
}
int
nouveau_bo_new
(
struct
drm_device
*
dev
,
int
size
,
int
align
,
nouveau_bo_new
(
struct
nouveau_cli
*
cli
,
int
size
,
int
align
,
uint32_t
flags
,
uint32_t
tile_mode
,
uint32_t
tile_flags
,
struct
sg_table
*
sg
,
struct
reservation_object
*
robj
,
struct
nouveau_bo
**
pnvbo
)
{
struct
nouveau_drm
*
drm
=
nouveau_drm
(
dev
);
struct
nouveau_drm
*
drm
=
nouveau_drm
(
cli
->
dev
);
struct
nouveau_bo
*
nvbo
;
size_t
acc_size
;
int
ret
;
...
...
@@ -208,6 +208,7 @@ nouveau_bo_new(struct drm_device *dev, int size, int align,
nvbo
->
tile_mode
=
tile_mode
;
nvbo
->
tile_flags
=
tile_flags
;
nvbo
->
bo
.
bdev
=
&
drm
->
ttm
.
bdev
;
nvbo
->
cli
=
cli
;
if
(
!
nvxx_device
(
&
drm
->
device
)
->
func
->
cpu_coherent
)
nvbo
->
force_coherent
=
flags
&
TTM_PL_FLAG_UNCACHED
;
...
...
drivers/gpu/drm/nouveau/nouveau_bo.h
View file @
bab7cc18
...
...
@@ -26,6 +26,8 @@ struct nouveau_bo {
struct
list_head
vma_list
;
unsigned
page_shift
;
struct
nouveau_cli
*
cli
;
u32
tile_mode
;
u32
tile_flags
;
struct
nouveau_drm_tile
*
tile
;
...
...
@@ -69,7 +71,7 @@ nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pnvbo)
extern
struct
ttm_bo_driver
nouveau_bo_driver
;
void
nouveau_bo_move_init
(
struct
nouveau_drm
*
);
int
nouveau_bo_new
(
struct
drm_device
*
,
int
size
,
int
align
,
u32
flags
,
int
nouveau_bo_new
(
struct
nouveau_cli
*
,
int
size
,
int
align
,
u32
flags
,
u32
tile_mode
,
u32
tile_flags
,
struct
sg_table
*
sg
,
struct
reservation_object
*
robj
,
struct
nouveau_bo
**
);
...
...
drivers/gpu/drm/nouveau/nouveau_chan.c
View file @
bab7cc18
...
...
@@ -113,7 +113,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
if
(
nouveau_vram_pushbuf
)
target
=
TTM_PL_FLAG_VRAM
;
ret
=
nouveau_bo_new
(
drm
->
dev
,
size
,
0
,
target
,
0
,
0
,
NULL
,
NULL
,
ret
=
nouveau_bo_new
(
cli
,
size
,
0
,
target
,
0
,
0
,
NULL
,
NULL
,
&
chan
->
push
.
buffer
);
if
(
ret
==
0
)
{
ret
=
nouveau_bo_pin
(
chan
->
push
.
buffer
,
target
,
false
);
...
...
drivers/gpu/drm/nouveau/nouveau_gem.c
View file @
bab7cc18
...
...
@@ -194,7 +194,7 @@ nouveau_gem_new(struct drm_device *dev, int size, int align, uint32_t domain,
if
(
domain
&
NOUVEAU_GEM_DOMAIN_COHERENT
)
flags
|=
TTM_PL_FLAG_UNCACHED
;
ret
=
nouveau_bo_new
(
dev
,
size
,
align
,
flags
,
tile_mode
,
ret
=
nouveau_bo_new
(
&
drm
->
client
,
size
,
align
,
flags
,
tile_mode
,
tile_flags
,
NULL
,
NULL
,
pnvbo
);
if
(
ret
)
return
ret
;
...
...
drivers/gpu/drm/nouveau/nouveau_prime.c
View file @
bab7cc18
...
...
@@ -60,6 +60,7 @@ struct drm_gem_object *nouveau_gem_prime_import_sg_table(struct drm_device *dev,
struct
dma_buf_attachment
*
attach
,
struct
sg_table
*
sg
)
{
struct
nouveau_drm
*
drm
=
nouveau_drm
(
dev
);
struct
nouveau_bo
*
nvbo
;
struct
reservation_object
*
robj
=
attach
->
dmabuf
->
resv
;
u32
flags
=
0
;
...
...
@@ -68,7 +69,7 @@ struct drm_gem_object *nouveau_gem_prime_import_sg_table(struct drm_device *dev,
flags
=
TTM_PL_FLAG_TT
;
ww_mutex_lock
(
&
robj
->
lock
,
NULL
);
ret
=
nouveau_bo_new
(
dev
,
attach
->
dmabuf
->
size
,
0
,
flags
,
0
,
0
,
ret
=
nouveau_bo_new
(
&
drm
->
client
,
attach
->
dmabuf
->
size
,
0
,
flags
,
0
,
0
,
sg
,
robj
,
&
nvbo
);
ww_mutex_unlock
(
&
robj
->
lock
);
if
(
ret
)
...
...
drivers/gpu/drm/nouveau/nv17_fence.c
View file @
bab7cc18
...
...
@@ -129,7 +129,7 @@ nv17_fence_create(struct nouveau_drm *drm)
priv
->
base
.
context_base
=
dma_fence_context_alloc
(
priv
->
base
.
contexts
);
spin_lock_init
(
&
priv
->
lock
);
ret
=
nouveau_bo_new
(
drm
->
dev
,
4096
,
0x1000
,
TTM_PL_FLAG_VRAM
,
ret
=
nouveau_bo_new
(
&
drm
->
client
,
4096
,
0x1000
,
TTM_PL_FLAG_VRAM
,
0
,
0x0000
,
NULL
,
NULL
,
&
priv
->
bo
);
if
(
!
ret
)
{
ret
=
nouveau_bo_pin
(
priv
->
bo
,
TTM_PL_FLAG_VRAM
,
false
);
...
...
drivers/gpu/drm/nouveau/nv50_display.c
View file @
bab7cc18
...
...
@@ -2428,7 +2428,7 @@ nv50_head_create(struct drm_device *dev, int index)
drm_crtc_helper_add
(
crtc
,
&
nv50_head_help
);
drm_mode_crtc_set_gamma_size
(
crtc
,
256
);
ret
=
nouveau_bo_new
(
dev
,
8192
,
0x100
,
TTM_PL_FLAG_VRAM
,
ret
=
nouveau_bo_new
(
&
drm
->
client
,
8192
,
0x100
,
TTM_PL_FLAG_VRAM
,
0
,
0x0000
,
NULL
,
NULL
,
&
head
->
base
.
lut
.
nvbo
);
if
(
!
ret
)
{
ret
=
nouveau_bo_pin
(
head
->
base
.
lut
.
nvbo
,
TTM_PL_FLAG_VRAM
,
true
);
...
...
@@ -4451,7 +4451,7 @@ nv50_display_create(struct drm_device *dev)
dev
->
driver
->
driver_features
|=
DRIVER_ATOMIC
;
/* small shared memory area we use for notifiers and semaphores */
ret
=
nouveau_bo_new
(
dev
,
4096
,
0x1000
,
TTM_PL_FLAG_VRAM
,
ret
=
nouveau_bo_new
(
&
drm
->
client
,
4096
,
0x1000
,
TTM_PL_FLAG_VRAM
,
0
,
0x0000
,
NULL
,
NULL
,
&
disp
->
sync
);
if
(
!
ret
)
{
ret
=
nouveau_bo_pin
(
disp
->
sync
,
TTM_PL_FLAG_VRAM
,
true
);
...
...
drivers/gpu/drm/nouveau/nv50_fence.c
View file @
bab7cc18
...
...
@@ -82,7 +82,7 @@ nv50_fence_create(struct nouveau_drm *drm)
priv
->
base
.
context_base
=
dma_fence_context_alloc
(
priv
->
base
.
contexts
);
spin_lock_init
(
&
priv
->
lock
);
ret
=
nouveau_bo_new
(
drm
->
dev
,
4096
,
0x1000
,
TTM_PL_FLAG_VRAM
,
ret
=
nouveau_bo_new
(
&
drm
->
client
,
4096
,
0x1000
,
TTM_PL_FLAG_VRAM
,
0
,
0x0000
,
NULL
,
NULL
,
&
priv
->
bo
);
if
(
!
ret
)
{
ret
=
nouveau_bo_pin
(
priv
->
bo
,
TTM_PL_FLAG_VRAM
,
false
);
...
...
drivers/gpu/drm/nouveau/nv84_fence.c
View file @
bab7cc18
...
...
@@ -219,8 +219,8 @@ nv84_fence_create(struct nouveau_drm *drm)
* will lose CPU/GPU coherency!
*/
TTM_PL_FLAG_TT
|
TTM_PL_FLAG_UNCACHED
;
ret
=
nouveau_bo_new
(
drm
->
dev
,
16
*
priv
->
base
.
contexts
,
0
,
domain
,
0
,
0
,
NULL
,
NULL
,
&
priv
->
bo
);
ret
=
nouveau_bo_new
(
&
drm
->
client
,
16
*
priv
->
base
.
contexts
,
0
,
domain
,
0
,
0
,
NULL
,
NULL
,
&
priv
->
bo
);
if
(
ret
==
0
)
{
ret
=
nouveau_bo_pin
(
priv
->
bo
,
domain
,
false
);
if
(
ret
==
0
)
{
...
...
@@ -233,7 +233,7 @@ nv84_fence_create(struct nouveau_drm *drm)
}
if
(
ret
==
0
)
ret
=
nouveau_bo_new
(
drm
->
dev
,
16
*
priv
->
base
.
contexts
,
0
,
ret
=
nouveau_bo_new
(
&
drm
->
client
,
16
*
priv
->
base
.
contexts
,
0
,
TTM_PL_FLAG_TT
|
TTM_PL_FLAG_UNCACHED
,
0
,
0
,
NULL
,
NULL
,
&
priv
->
bo_gart
);
if
(
ret
==
0
)
{
...
...
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