Commit bb170e61 authored by Philip Avinash's avatar Philip Avinash Committed by Sekhar Nori

ARM: davinci: da850: add ECAP & EHRPWM clock nodes

Add ECAP and EHRPWM module clock nodes. Also add a clock
node for TBCLK for EHRWPM.
Signed-off-by: default avatarPhilip Avinash <avinashphilip@ti.com>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent c6007ffe
...@@ -383,6 +383,49 @@ static struct clk dsp_clk = { ...@@ -383,6 +383,49 @@ static struct clk dsp_clk = {
.flags = PSC_LRST | PSC_FORCE, .flags = PSC_LRST | PSC_FORCE,
}; };
static struct clk ehrpwm_clk = {
.name = "ehrpwm",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
.flags = DA850_CLK_ASYNC3,
};
#define DA8XX_EHRPWM_TBCLKSYNC BIT(12)
static void ehrpwm_tblck_enable(struct clk *clk)
{
u32 val;
val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
val |= DA8XX_EHRPWM_TBCLKSYNC;
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
static void ehrpwm_tblck_disable(struct clk *clk)
{
u32 val;
val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
val &= ~DA8XX_EHRPWM_TBCLKSYNC;
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
static struct clk ehrpwm_tbclk = {
.name = "ehrpwm_tbclk",
.parent = &ehrpwm_clk,
.clk_enable = ehrpwm_tblck_enable,
.clk_disable = ehrpwm_tblck_disable,
};
static struct clk ecap_clk = {
.name = "ecap",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
.flags = DA850_CLK_ASYNC3,
};
static struct clk_lookup da850_clks[] = { static struct clk_lookup da850_clks[] = {
CLK(NULL, "ref", &ref_clk), CLK(NULL, "ref", &ref_clk),
CLK(NULL, "pll0", &pll0_clk), CLK(NULL, "pll0", &pll0_clk),
...@@ -430,6 +473,9 @@ static struct clk_lookup da850_clks[] = { ...@@ -430,6 +473,9 @@ static struct clk_lookup da850_clks[] = {
CLK("vpif", NULL, &vpif_clk), CLK("vpif", NULL, &vpif_clk),
CLK("ahci", NULL, &sata_clk), CLK("ahci", NULL, &sata_clk),
CLK("davinci-rproc.0", NULL, &dsp_clk), CLK("davinci-rproc.0", NULL, &dsp_clk),
CLK("ehrpwm", "fck", &ehrpwm_clk),
CLK("ehrpwm", "tbclk", &ehrpwm_tbclk),
CLK("ecap", "fck", &ecap_clk),
CLK(NULL, NULL, NULL), CLK(NULL, NULL, NULL),
}; };
......
...@@ -55,6 +55,7 @@ extern unsigned int da850_max_speed; ...@@ -55,6 +55,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
#define DA8XX_JTAG_ID_REG 0x18 #define DA8XX_JTAG_ID_REG 0x18
#define DA8XX_CFGCHIP0_REG 0x17c #define DA8XX_CFGCHIP0_REG 0x17c
#define DA8XX_CFGCHIP1_REG 0x180
#define DA8XX_CFGCHIP2_REG 0x184 #define DA8XX_CFGCHIP2_REG 0x184
#define DA8XX_CFGCHIP3_REG 0x188 #define DA8XX_CFGCHIP3_REG 0x188
......
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