Commit bbbbeb8e authored by Lin Ming's avatar Lin Ming Committed by Len Brown

ACPICA: Remove unused ACPI register bit definition

Removed the ACPI_BITREG_WAKE_ENABLE definition and entry in the
global register table. This bit does not exist and is unused.

http://www.acpica.org/bugzilla/show_bug.cgi?id=442Signed-off-by: default avatarLin Ming <ming.m.lin@intel.com>
Signed-off-by: default avatarBob Moore <robert.moore@intel.com>
Signed-off-by: default avatarLen Brown <len.brown@intel.com>
parent 51f52819
......@@ -281,7 +281,6 @@ struct acpi_bit_register_info acpi_gbl_bit_register_info[ACPI_NUM_BITREG] = {
/* ACPI_BITREG_RT_CLOCK_ENABLE */ {ACPI_REGISTER_PM1_ENABLE,
ACPI_BITPOSITION_RT_CLOCK_ENABLE,
ACPI_BITMASK_RT_CLOCK_ENABLE},
/* ACPI_BITREG_WAKE_ENABLE */ {ACPI_REGISTER_PM1_ENABLE, 0, 0},
/* ACPI_BITREG_PCIEXP_WAKE_DISABLE */ {ACPI_REGISTER_PM1_ENABLE,
ACPI_BITPOSITION_PCIEXP_WAKE_DISABLE,
ACPI_BITMASK_PCIEXP_WAKE_DISABLE},
......
......@@ -607,8 +607,15 @@ typedef u8 acpi_adr_space_type;
/*
* bit_register IDs
* These are bitfields defined within the full ACPI registers
*
* These values are intended to be used by the hardware interfaces
* and are mapped to individual bitfields defined within the ACPI
* registers. See the acpi_gbl_bit_register_info global table in utglobal.c
* for this mapping.
*/
/* PM1 Status register */
#define ACPI_BITREG_TIMER_STATUS 0x00
#define ACPI_BITREG_BUS_MASTER_STATUS 0x01
#define ACPI_BITREG_GLOBAL_LOCK_STATUS 0x02
......@@ -618,24 +625,29 @@ typedef u8 acpi_adr_space_type;
#define ACPI_BITREG_WAKE_STATUS 0x06
#define ACPI_BITREG_PCIEXP_WAKE_STATUS 0x07
/* PM1 Enable register */
#define ACPI_BITREG_TIMER_ENABLE 0x08
#define ACPI_BITREG_GLOBAL_LOCK_ENABLE 0x09
#define ACPI_BITREG_POWER_BUTTON_ENABLE 0x0A
#define ACPI_BITREG_SLEEP_BUTTON_ENABLE 0x0B
#define ACPI_BITREG_RT_CLOCK_ENABLE 0x0C
#define ACPI_BITREG_WAKE_ENABLE 0x0D
#define ACPI_BITREG_PCIEXP_WAKE_DISABLE 0x0E
#define ACPI_BITREG_PCIEXP_WAKE_DISABLE 0x0D
/* PM1 Control register */
#define ACPI_BITREG_SCI_ENABLE 0x0E
#define ACPI_BITREG_BUS_MASTER_RLD 0x0F
#define ACPI_BITREG_GLOBAL_LOCK_RELEASE 0x10
#define ACPI_BITREG_SLEEP_TYPE_A 0x11
#define ACPI_BITREG_SLEEP_TYPE_B 0x12
#define ACPI_BITREG_SLEEP_ENABLE 0x13
#define ACPI_BITREG_SCI_ENABLE 0x0F
#define ACPI_BITREG_BUS_MASTER_RLD 0x10
#define ACPI_BITREG_GLOBAL_LOCK_RELEASE 0x11
#define ACPI_BITREG_SLEEP_TYPE_A 0x12
#define ACPI_BITREG_SLEEP_TYPE_B 0x13
#define ACPI_BITREG_SLEEP_ENABLE 0x14
/* PM2 Control register */
#define ACPI_BITREG_ARB_DISABLE 0x15
#define ACPI_BITREG_ARB_DISABLE 0x14
#define ACPI_BITREG_MAX 0x15
#define ACPI_BITREG_MAX 0x14
#define ACPI_NUM_BITREG ACPI_BITREG_MAX + 1
/*
......
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