Commit bca6ef1e authored by Sascha Hauer's avatar Sascha Hauer

MXC: Add iomux support for MX35 SoCs

This iomux is called iomux-v3 in the tree because it is the third known
incarnation of MXC iomuxers. It is not only found on the MX35 but also
on the MX51 and probably others.
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 01eb1753
...@@ -5,6 +5,7 @@ config ARCH_MX31 ...@@ -5,6 +5,7 @@ config ARCH_MX31
config ARCH_MX35 config ARCH_MX35
bool bool
select ARCH_MXC_IOMUX_V3
comment "MX3 platforms:" comment "MX3 platforms:"
......
...@@ -51,4 +51,6 @@ config MXC_PWM ...@@ -51,4 +51,6 @@ config MXC_PWM
help help
Enable support for the i.MX PWM controller(s). Enable support for the i.MX PWM controller(s).
config ARCH_MXC_IOMUX_V3
bool
endif endif
...@@ -7,4 +7,5 @@ obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o ...@@ -7,4 +7,5 @@ obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o
obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o
obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
obj-$(CONFIG_MXC_PWM) += pwm.o obj-$(CONFIG_MXC_PWM) += pwm.o
/*
* Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
* <armlinux@phytec.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#ifndef __MACH_IOMUX_V3_H__
#define __MACH_IOMUX_V3_H__
/*
* build IOMUX_PAD structure
*
* This iomux scheme is based around pads, which are the physical balls
* on the processor.
*
* - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls
* things like driving strength and pullup/pulldown.
* - Each pad can have but not necessarily does have an output routing register
* (IOMUXC_SW_MUX_CTL_PAD_x).
* - Each pad can have but not necessarily does have an input routing register
* (IOMUXC_x_SELECT_INPUT)
*
* The three register sets do not have a fixed offset to each other,
* hence we order this table by pad control registers (which all pads
* have) and put the optional i/o routing registers into additional
* fields.
*
* The naming convention for the pad modes is MX35_PAD_<padname>__<padmode>
* If <padname> or <padmode> refers to a GPIO, it is named
* GPIO_<unit>_<num>
*
*/
struct pad_desc {
unsigned mux_ctrl_ofs:12; /* IOMUXC_SW_MUX_CTL_PAD offset */
unsigned mux_mode:8;
unsigned pad_ctrl_ofs:12; /* IOMUXC_SW_PAD_CTRL offset */
#define NO_PAD_CTRL (1 << 16)
unsigned pad_ctrl:17;
unsigned select_input_ofs:12; /* IOMUXC_SELECT_INPUT offset */
unsigned select_input:3;
};
#define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _select_input_ofs, \
_select_input, _pad_ctrl) \
{ \
.mux_ctrl_ofs = _mux_ctrl_ofs, \
.mux_mode = _mux_mode, \
.pad_ctrl_ofs = _pad_ctrl_ofs, \
.pad_ctrl = _pad_ctrl, \
.select_input_ofs = _select_input_ofs, \
.select_input = _select_input, \
}
/*
* Use to set PAD control
*/
#define PAD_CTL_DRIVE_VOLTAGE_3_3_V 0
#define PAD_CTL_DRIVE_VOLTAGE_1_8_V 1
#define PAD_CTL_NO_HYSTERESIS 0
#define PAD_CTL_HYSTERESIS 1
#define PAD_CTL_PULL_DISABLED 0x0
#define PAD_CTL_PULL_KEEPER 0xa
#define PAD_CTL_PULL_DOWN_100K 0xc
#define PAD_CTL_PULL_UP_47K 0xd
#define PAD_CTL_PULL_UP_100K 0xe
#define PAD_CTL_PULL_UP_22K 0xf
#define PAD_CTL_OUTPUT_CMOS 0
#define PAD_CTL_OUTPUT_OPEN_DRAIN 1
#define PAD_CTL_DRIVE_STRENGTH_NORM 0
#define PAD_CTL_DRIVE_STRENGTH_HIGH 1
#define PAD_CTL_DRIVE_STRENGTH_MAX 2
#define PAD_CTL_SLEW_RATE_SLOW 0
#define PAD_CTL_SLEW_RATE_FAST 1
/*
* setups a single pad:
* - reserves the pad so that it is not claimed by another driver
* - setups the iomux according to the configuration
*/
int mxc_iomux_v3_setup_pad(struct pad_desc *pad);
/*
* setups mutliple pads
* convenient way to call the above function with tables
*/
int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count);
/*
* releases a single pad:
* - make it available for a future use by another driver
* - DOES NOT reconfigure the IOMUX in its reset state
*/
void mxc_iomux_v3_release_pad(struct pad_desc *pad);
/*
* releases multiple pads
* convenvient way to call the above function with tables
*/
void mxc_iomux_v3_release_multiple_pads(struct pad_desc *pad_list, int count);
#endif /* __MACH_IOMUX_V3_H__*/
/*
* Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
* Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
* <armlinux@phytec.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/mach/map.h>
#include <mach/iomux-v3.h>
#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR)
static unsigned long iomux_v3_pad_alloc_map[0x200 / BITS_PER_LONG];
/*
* setups a single pin:
* - reserves the pin so that it is not claimed by another driver
* - setups the iomux according to the configuration
*/
int mxc_iomux_v3_setup_pad(struct pad_desc *pad)
{
unsigned int pad_ofs = pad->pad_ctrl_ofs;
if (test_and_set_bit(pad_ofs >> 2, iomux_v3_pad_alloc_map))
return -EBUSY;
if (pad->mux_ctrl_ofs)
__raw_writel(pad->mux_mode, IOMUX_BASE + pad->mux_ctrl_ofs);
if (pad->select_input_ofs)
__raw_writel(pad->select_input,
IOMUX_BASE + pad->select_input_ofs);
if (!(pad->pad_ctrl & NO_PAD_CTRL))
__raw_writel(pad->pad_ctrl, IOMUX_BASE + pad->pad_ctrl_ofs);
return 0;
}
EXPORT_SYMBOL(mxc_iomux_v3_setup_pad);
int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count)
{
struct pad_desc *p = pad_list;
int i;
int ret;
for (i = 0; i < count; i++) {
ret = mxc_iomux_v3_setup_pad(p);
if (ret)
goto setup_error;
p++;
}
return 0;
setup_error:
mxc_iomux_v3_release_multiple_pads(pad_list, i);
return ret;
}
EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads);
void mxc_iomux_v3_release_pad(struct pad_desc *pad)
{
unsigned int pad_ofs = pad->pad_ctrl_ofs;
clear_bit(pad_ofs >> 2, iomux_v3_pad_alloc_map);
}
EXPORT_SYMBOL(mxc_iomux_v3_release_pad);
void mxc_iomux_v3_release_multiple_pads(struct pad_desc *pad_list, int count)
{
struct pad_desc *p = pad_list;
int i;
for (i = 0; i < count; i++) {
mxc_iomux_v3_release_pad(p);
p++;
}
}
EXPORT_SYMBOL(mxc_iomux_v3_release_multiple_pads);
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