Commit be12ab23 authored by Russell King's avatar Russell King

[ARM] Add cm_control() for Integrator AP and PP2 platforms.

parent f99d18fe
......@@ -11,10 +11,13 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/spinlock.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/hardware/amba.h>
#include <asm/arch/cm.h>
static struct amba_device rtc_device = {
.dev = {
......@@ -102,3 +105,25 @@ static int __init integrator_init(void)
}
arch_initcall(integrator_init);
#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
static spinlock_t cm_lock;
/**
* cm_control - update the CM_CTRL register.
* @mask: bits to change
* @set: bits to set
*/
void cm_control(u32 mask, u32 set)
{
unsigned long flags;
u32 val;
spin_lock_irqsave(&cm_lock, flags);
val = readl(CM_CTRL) & ~mask;
writel(val | set, CM_CTRL);
spin_unlock_irqrestore(&cm_lock, flags);
}
EXPORT_SYMBOL(cm_control);
......@@ -28,6 +28,7 @@
#include <asm/leds.h>
#include <asm/system.h>
#include <asm/mach-types.h>
#include <asm/arch/cm.h>
static int saved_leds;
......@@ -35,9 +36,6 @@ static void integrator_leds_event(led_event_t ledevt)
{
unsigned long flags;
const unsigned int dbg_base = IO_ADDRESS(INTEGRATOR_DBG_BASE);
const unsigned int hdr_ctrl = IO_ADDRESS(INTEGRATOR_HDR_BASE) +
INTEGRATOR_HDR_CTRL_OFFSET;
unsigned int ctrl;
unsigned int update_alpha_leds;
// yup, change the LEDs
......@@ -46,15 +44,11 @@ static void integrator_leds_event(led_event_t ledevt)
switch(ledevt) {
case led_idle_start:
ctrl = __raw_readl(hdr_ctrl);
ctrl &= ~INTEGRATOR_HDR_CTRL_LED;
__raw_writel(ctrl, hdr_ctrl);
cm_control(CM_CTRL_LED, 0);
break;
case led_idle_end:
ctrl = __raw_readl(hdr_ctrl);
ctrl |= INTEGRATOR_HDR_CTRL_LED;
__raw_writel(ctrl, hdr_ctrl);
cm_control(CM_CTRL_LED, CM_CTRL_LED);
break;
case led_timer:
......
/*
* update the core module control register.
*/
void cm_control(u32, u32);
#define CM_CTRL_LED (1 << 0)
#define CM_CTRL_nMBDET (1 << 1)
#define CM_CTRL_REMAP (1 << 2)
#define CM_CTRL_RESET (1 << 3)
/*
* Integrator/AP,PP2 specific
*/
#define CM_CTRL_HIGHVECTORS (1 << 4)
#define CM_CTRL_BIGENDIAN (1 << 5)
#define CM_CTRL_FASTBUS (1 << 6)
#define CM_CTRL_SYNC (1 << 7)
/*
* ARM926/946/966 Integrator/CP specific
*/
#define CM_CTRL_LCDBIASEN (1 << 8)
#define CM_CTRL_LCDBIASUP (1 << 9)
#define CM_CTRL_LCDBIASDN (1 << 10)
#define CM_CTRL_LCDMUXSEL_MASK (7 << 11)
#define CM_CTRL_LCDMUXSEL_GENLCD (1 << 11)
#define CM_CTRL_LCDMUXSEL_SHARPLCD1 (3 << 11)
#define CM_CTRL_LCDMUXSEL_SHARPLCD2 (4 << 11)
#define CM_CTRL_LCDMUXSEL_VGA (7 << 11)
#define CM_CTRL_LCDEN0 (1 << 14)
#define CM_CTRL_LCDEN1 (1 << 15)
#define CM_CTRL_STATIC1 (1 << 16)
#define CM_CTRL_STATIC2 (1 << 17)
#define CM_CTRL_STATIC (1 << 18)
#define CM_CTRL_n24BITEN (1 << 19)
#define CM_CTRL_EBIWP (1 << 20)
......@@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <asm/arch/platform.h>
#include <asm/arch/cm.h>
static inline void arch_idle(void)
{
......@@ -34,16 +34,11 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode)
{
unsigned int hdr_ctrl = (IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET);
unsigned int val;
/*
* To reset, we hit the on-board reset register
* in the system FPGA
*/
val = __raw_readl(hdr_ctrl);
val |= INTEGRATOR_HDR_CTRL_RESET;
__raw_writel(val, hdr_ctrl);
cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
}
#endif
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