Commit be15cd72 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

parents e9d52234 37d07b72
......@@ -8,7 +8,7 @@
# Copyright (C) 1995-2001 by Russell King
LDFLAGS_vmlinux :=-p --no-undefined -X
CPPFLAGS_vmlinux.lds = -DTEXTADDR=$(TEXTADDR) -DDATAADDR=$(DATAADDR)
CPPFLAGS_vmlinux.lds = -DKERNEL_RAM_ADDR=$(TEXTADDR)
OBJCOPYFLAGS :=-O binary -R .note -R .comment -S
GZFLAGS :=-9
#CFLAGS +=-pipe
......@@ -108,27 +108,19 @@ export CFLAGS_3c589_cs.o
endif
TEXTADDR := $(textaddr-y)
ifeq ($(CONFIG_XIP_KERNEL),y)
DATAADDR := $(TEXTADDR)
xipaddr-$(CONFIG_ARCH_CO285) := 0x5f000000
xipaddr-y ?= 0xbf000000
# Replace phys addr with virt addr while keeping offset from base.
TEXTADDR := $(shell echo $(CONFIG_XIP_PHYS_ADDR) $(xipaddr-y) | \
awk --non-decimal-data '/[:xdigit:]/ \
{ printf("0x%x\n", and($$1, 0x000fffff) + $$2) }' )
endif
ifeq ($(incdir-y),)
incdir-y := $(machine-y)
endif
INCDIR := arch-$(incdir-y)
ifneq ($(machine-y),)
MACHINE := arch/arm/mach-$(machine-y)/
else
MACHINE :=
endif
export TEXTADDR DATAADDR GZFLAGS
export TEXTADDR GZFLAGS
# Do we have FASTFPE?
FASTFPE :=arch/arm/fastfpe
......
......@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
AFLAGS_head.o := -DTEXTADDR=$(TEXTADDR) -DDATAADDR=$(DATAADDR)
AFLAGS_head.o := -DKERNEL_RAM_ADDR=$(TEXTADDR)
# Object file lists.
......
......@@ -94,7 +94,6 @@ int main(void)
DEFINE(VM_EXEC, VM_EXEC);
BLANK();
DEFINE(PAGE_SZ, PAGE_SIZE);
DEFINE(VIRT_OFFSET, PAGE_OFFSET);
BLANK();
DEFINE(SYS_ERROR0, 0x9f0000);
BLANK();
......
......@@ -15,6 +15,7 @@
*/
#include <linux/config.h>
#include <asm/memory.h>
#include <asm/glue.h>
#include <asm/vfpmacros.h>
#include <asm/hardware.h> /* should be moved into entry-macro.S */
......@@ -310,7 +311,7 @@ __pabt_svc:
#if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
@ make sure our user space atomic helper is aborted
cmp r2, #VIRT_OFFSET
cmp r2, #TASK_SIZE
bichs r3, r3, #PSR_Z_BIT
#endif
......
......@@ -21,6 +21,7 @@
#include <asm/procinfo.h>
#include <asm/ptrace.h>
#include <asm/asm-offsets.h>
#include <asm/memory.h>
#include <asm/thread_info.h>
#include <asm/system.h>
......@@ -33,52 +34,28 @@
#define MACHINFO_PGOFFIO 12
#define MACHINFO_NAME 16
#ifndef CONFIG_XIP_KERNEL
/*
* We place the page tables 16K below TEXTADDR. Therefore, we must make sure
* that TEXTADDR is correctly set. Currently, we expect the least significant
* 16 bits to be 0x8000, but we could probably relax this restriction to
* TEXTADDR >= PAGE_OFFSET + 0x4000
*
* Note that swapper_pg_dir is the virtual address of the page tables, and
* pgtbl gives us a position-independent reference to these tables. We can
* do this because stext == TEXTADDR
* swapper_pg_dir is the virtual address of the initial page table.
* We place the page tables 16K below KERNEL_RAM_ADDR. Therefore, we must
* make sure that KERNEL_RAM_ADDR is correctly set. Currently, we expect
* the least significant 16 bits to be 0x8000, but we could probably
* relax this restriction to KERNEL_RAM_ADDR >= PAGE_OFFSET + 0x4000.
*/
#if (TEXTADDR & 0xffff) != 0x8000
#error TEXTADDR must start at 0xXXXX8000
#if (KERNEL_RAM_ADDR & 0xffff) != 0x8000
#error KERNEL_RAM_ADDR must start at 0xXXXX8000
#endif
.globl swapper_pg_dir
.equ swapper_pg_dir, TEXTADDR - 0x4000
.equ swapper_pg_dir, KERNEL_RAM_ADDR - 0x4000
.macro pgtbl, rd, phys
adr \rd, stext
sub \rd, \rd, #0x4000
.macro pgtbl, rd
ldr \rd, =(__virt_to_phys(KERNEL_RAM_ADDR - 0x4000))
.endm
#else
/*
* XIP Kernel:
*
* We place the page tables 16K below DATAADDR. Therefore, we must make sure
* that DATAADDR is correctly set. Currently, we expect the least significant
* 16 bits to be 0x8000, but we could probably relax this restriction to
* DATAADDR >= PAGE_OFFSET + 0x4000
*
* Note that pgtbl is meant to return the physical address of swapper_pg_dir.
* We can't make it relative to the kernel position in this case since
* the kernel can physically be anywhere.
*/
#if (DATAADDR & 0xffff) != 0x8000
#error DATAADDR must start at 0xXXXX8000
#endif
.globl swapper_pg_dir
.equ swapper_pg_dir, DATAADDR - 0x4000
.macro pgtbl, rd, phys
ldr \rd, =((DATAADDR - 0x4000) - VIRT_OFFSET)
add \rd, \rd, \phys
.endm
#ifdef CONFIG_XIP_KERNEL
#define TEXTADDR XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
#else
#define TEXTADDR KERNEL_RAM_ADDR
#endif
/*
......@@ -279,7 +256,7 @@ __turn_mmu_on:
.type __create_page_tables, %function
__create_page_tables:
ldr r5, [r8, #MACHINFO_PHYSRAM] @ physram
pgtbl r4, r5 @ page table address
pgtbl r4 @ page table address
/*
* Clear the 16K level 1 swapper page table
......@@ -324,7 +301,7 @@ __create_page_tables:
/*
* Then map first 1MB of ram in case it contains our boot params.
*/
add r0, r4, #VIRT_OFFSET >> 18
add r0, r4, #PAGE_OFFSET >> 18
orr r6, r5, r7
str r6, [r0]
......
......@@ -6,14 +6,23 @@
#include <asm-generic/vmlinux.lds.h>
#include <linux/config.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
OUTPUT_ARCH(arm)
ENTRY(stext)
#ifndef __ARMEB__
jiffies = jiffies_64;
#else
jiffies = jiffies_64 + 4;
#endif
#ifdef CONFIG_XIP_KERNEL
#define TEXTADDR XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
#else
#define TEXTADDR KERNEL_RAM_ADDR
#endif
SECTIONS
{
. = TEXTADDR;
......@@ -95,7 +104,7 @@ SECTIONS
#ifdef CONFIG_XIP_KERNEL
__data_loc = ALIGN(4); /* location in binary */
. = DATAADDR;
. = KERNEL_RAM_ADDR;
#else
. = ALIGN(THREAD_SIZE);
__data_loc = .;
......
......@@ -23,6 +23,7 @@
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <asm/irq.h>
#include "generic.h"
......@@ -283,6 +284,7 @@ static struct platform_device sa11x0mtd_device = {
void sa11x0_set_flash_data(struct flash_platform_data *flash,
struct resource *res, int nr)
{
flash->name = "sa1100";
sa11x0mtd_device.dev.platform_data = flash;
sa11x0mtd_device.resource = res;
sa11x0mtd_device.num_resources = nr;
......
......@@ -8,6 +8,8 @@
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/ioport.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <asm/hardware.h>
#include <asm/hardware/sa1111.h>
......@@ -16,6 +18,7 @@
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <asm/mach/serial_sa1100.h>
......@@ -108,6 +111,66 @@ static void __init jornada720_map_io(void)
sa1100_register_uart(1, 1);
}
static struct mtd_partition jornada720_partitions[] = {
{
.name = "JORNADA720 boot firmware",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE, /* force read-only */
}, {
.name = "JORNADA720 kernel",
.size = 0x000c0000,
.offset = 0x00040000,
}, {
.name = "JORNADA720 params",
.size = 0x00040000,
.offset = 0x00100000,
}, {
.name = "JORNADA720 initrd",
.size = 0x00100000,
.offset = 0x00140000,
}, {
.name = "JORNADA720 root cramfs",
.size = 0x00300000,
.offset = 0x00240000,
}, {
.name = "JORNADA720 usr cramfs",
.size = 0x00800000,
.offset = 0x00540000,
}, {
.name = "JORNADA720 usr local",
.size = 0, /* will expand to the end of the flash */
.offset = 0x00d00000,
}
};
static void jornada720_set_vpp(int vpp)
{
if (vpp)
PPSR |= 0x80;
else
PPSR &= ~0x80;
PPDR |= 0x80;
}
static struct flash_platform_data jornada720_flash_data = {
.map_name = "cfi_probe",
.set_vpp = jornada720_set_vpp,
.parts = jornada720_partitions,
.nr_parts = ARRAY_SIZE(jornada720_partitions),
};
static struct resource jornada720_flash_resource = {
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static void __init jornada720_mach_init(void)
{
sa11x0_set_flash_data(&jornada720_flash_data, &jornada720_flash_resource, 1);
}
MACHINE_START(JORNADA720, "HP Jornada 720")
/* Maintainer: Michael Gernoth <michael@gernoth.net> */
.phys_ram = 0xc0000000,
......@@ -117,4 +180,5 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
.map_io = jornada720_map_io,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = jornada720_mach_init,
MACHINE_END
......@@ -363,20 +363,16 @@ static void __init bootmem_init(struct meminfo *mi)
memcpy(&meminfo, mi, sizeof(meminfo));
#ifdef CONFIG_XIP_KERNEL
#error needs fixing
p->pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PMD_MASK);
p->virtual = (unsigned long)&_stext & PMD_MASK;
p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK;
p->type = MT_ROM;
p ++;
#endif
/*
* Clear out all the mappings below the kernel image.
* FIXME: what about XIP?
*/
for (addr = 0; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE)
pmd_clear(pmd_off_k(addr));
#ifdef CONFIG_XIP_KERNEL
/* The XIP kernel is mapped in the module area -- skip over it */
addr = ((unsigned long)&_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
#endif
for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
pmd_clear(pmd_off_k(addr));
/*
......@@ -435,6 +431,18 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
pmd_clear(pmd_off_k(addr));
/*
* Map the kernel if it is XIP.
* It is always first in the modulearea.
*/
#ifdef CONFIG_XIP_KERNEL
map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PGDIR_MASK);
map.virtual = MODULE_START;
map.length = ((unsigned long)&_etext - map.virtual + ~PGDIR_MASK) & PGDIR_MASK;
map.type = MT_ROM;
create_mapping(&map);
#endif
/*
* Map the cache flushing regions.
*/
......
......@@ -130,20 +130,21 @@ struct sa_subdev_info {
char name[16];
struct map_info map;
struct mtd_info *mtd;
struct flash_platform_data *data;
struct flash_platform_data *plat;
};
struct sa_info {
struct mtd_partition *parts;
struct mtd_info *mtd;
int num_subdev;
unsigned int nr_parts;
struct sa_subdev_info subdev[0];
};
static void sa1100_set_vpp(struct map_info *map, int on)
{
struct sa_subdev_info *subdev = container_of(map, struct sa_subdev_info, map);
subdev->data->set_vpp(on);
subdev->plat->set_vpp(on);
}
static void sa1100_destroy_subdev(struct sa_subdev_info *subdev)
......@@ -187,7 +188,7 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r
goto out;
}
if (subdev->data->set_vpp)
if (subdev->plat->set_vpp)
subdev->map.set_vpp = sa1100_set_vpp;
subdev->map.phys = phys;
......@@ -204,7 +205,7 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r
* Now let's probe for the actual flash. Do it here since
* specific machine settings might have been set above.
*/
subdev->mtd = do_map_probe(subdev->data->map_name, &subdev->map);
subdev->mtd = do_map_probe(subdev->plat->map_name, &subdev->map);
if (subdev->mtd == NULL) {
ret = -ENXIO;
goto err;
......@@ -223,13 +224,17 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r
return ret;
}
static void sa1100_destroy(struct sa_info *info)
static void sa1100_destroy(struct sa_info *info, struct flash_platform_data *plat)
{
int i;
if (info->mtd) {
del_mtd_partitions(info->mtd);
if (info->nr_parts == 0)
del_mtd_device(info->mtd);
#ifdef CONFIG_MTD_PARTITIONS
else
del_mtd_partitions(info->mtd);
#endif
#ifdef CONFIG_MTD_CONCAT
if (info->mtd != info->subdev[0].mtd)
mtd_concat_destroy(info->mtd);
......@@ -242,10 +247,13 @@ static void sa1100_destroy(struct sa_info *info)
for (i = info->num_subdev - 1; i >= 0; i--)
sa1100_destroy_subdev(&info->subdev[i]);
kfree(info);
if (plat->exit)
plat->exit();
}
static struct sa_info *__init
sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash)
sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *plat)
{
struct sa_info *info;
int nr, size, i, ret = 0;
......@@ -275,6 +283,12 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
memset(info, 0, size);
if (plat->init) {
ret = plat->init();
if (ret)
goto err;
}
/*
* Claim and then map the memory regions.
*/
......@@ -287,8 +301,8 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
break;
subdev->map.name = subdev->name;
sprintf(subdev->name, "sa1100-%d", i);
subdev->data = flash;
sprintf(subdev->name, "%s-%d", plat->name, i);
subdev->plat = plat;
ret = sa1100_probe_subdev(subdev, res);
if (ret)
......@@ -309,7 +323,7 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
* otherwise fail. Either way, it'll be called "sa1100".
*/
if (info->num_subdev == 1) {
strcpy(info->subdev[0].name, "sa1100");
strcpy(info->subdev[0].name, plat->name);
info->mtd = info->subdev[0].mtd;
ret = 0;
} else if (info->num_subdev > 1) {
......@@ -322,7 +336,7 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
cdev[i] = info->subdev[i].mtd;
info->mtd = mtd_concat_create(cdev, info->num_subdev,
"sa1100");
plat->name);
if (info->mtd == NULL)
ret = -ENXIO;
#else
......@@ -336,7 +350,7 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
return info;
err:
sa1100_destroy(info);
sa1100_destroy(info, plat);
out:
return ERR_PTR(ret);
}
......@@ -346,16 +360,16 @@ static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
static int __init sa1100_mtd_probe(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct flash_platform_data *flash = pdev->dev.platform_data;
struct flash_platform_data *plat = pdev->dev.platform_data;
struct mtd_partition *parts;
const char *part_type = NULL;
struct sa_info *info;
int err, nr_parts = 0;
if (!flash)
if (!plat)
return -ENODEV;
info = sa1100_setup_mtd(pdev, flash);
info = sa1100_setup_mtd(pdev, plat);
if (IS_ERR(info)) {
err = PTR_ERR(info);
goto out;
......@@ -372,8 +386,8 @@ static int __init sa1100_mtd_probe(struct device *dev)
} else
#endif
{
parts = flash->parts;
nr_parts = flash->nr_parts;
parts = plat->parts;
nr_parts = plat->nr_parts;
part_type = "static";
}
......@@ -387,6 +401,8 @@ static int __init sa1100_mtd_probe(struct device *dev)
add_mtd_partitions(info->mtd, parts, nr_parts);
}
info->nr_parts = nr_parts;
dev_set_drvdata(dev, info);
err = 0;
......@@ -397,8 +413,11 @@ static int __init sa1100_mtd_probe(struct device *dev)
static int __exit sa1100_mtd_remove(struct device *dev)
{
struct sa_info *info = dev_get_drvdata(dev);
struct flash_platform_data *plat = dev->platform_data;
dev_set_drvdata(dev, NULL);
sa1100_destroy(info);
sa1100_destroy(info, plat);
return 0;
}
......@@ -421,9 +440,17 @@ static int sa1100_mtd_resume(struct device *dev)
info->mtd->resume(info->mtd);
return 0;
}
static void sa1100_mtd_shutdown(struct device *dev)
{
struct sa_info *info = dev_get_drvdata(dev);
if (info && info->mtd->suspend(info->mtd) == 0)
info->mtd->resume(info->mtd);
}
#else
#define sa1100_mtd_suspend NULL
#define sa1100_mtd_resume NULL
#define sa1100_mtd_shutdown NULL
#endif
static struct device_driver sa1100_mtd_driver = {
......@@ -433,6 +460,7 @@ static struct device_driver sa1100_mtd_driver = {
.remove = __exit_p(sa1100_mtd_remove),
.suspend = sa1100_mtd_suspend,
.resume = sa1100_mtd_resume,
.shutdown = sa1100_mtd_shutdown,
};
static int __init sa1100_mtd_init(void)
......
......@@ -13,7 +13,7 @@
#include <linux/config.h>
#define PHYS_OFFSET (0xf0000000UL)
#define PHYS_OFFSET UL(0xf0000000)
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
......
......@@ -17,7 +17,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x10000000UL)
#define PHYS_OFFSET UL(0x10000000)
/*
* These are exactly the same on the RiscPC as the
......
......@@ -25,7 +25,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0xc0000000UL)
#define PHYS_OFFSET UL(0xc0000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -19,7 +19,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x00000000UL)
#define PHYS_OFFSET UL(0x00000000)
/*
* We keep this 1:1 so that we don't interfere
......
......@@ -46,14 +46,14 @@ extern unsigned long __bus_to_virt(unsigned long);
#if defined(CONFIG_ARCH_FOOTBRIDGE)
/* Task size and page offset at 3GB */
#define TASK_SIZE (0xbf000000UL)
#define PAGE_OFFSET (0xc0000000UL)
#define TASK_SIZE UL(0xbf000000)
#define PAGE_OFFSET UL(0xc0000000)
#elif defined(CONFIG_ARCH_CO285)
/* Task size and page offset at 1.5GB */
#define TASK_SIZE (0x5f000000UL)
#define PAGE_OFFSET (0x60000000UL)
#define TASK_SIZE UL(0x5f000000)
#define PAGE_OFFSET UL(0x60000000)
#else
......@@ -64,7 +64,7 @@ extern unsigned long __bus_to_virt(unsigned long);
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x00000000UL)
#define PHYS_OFFSET UL(0x00000000)
/*
* This decides where the kernel will search for a free chunk of vm
......
......@@ -23,7 +23,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x00000000UL)
#define PHYS_OFFSET UL(0x00000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -11,7 +11,7 @@
* Page offset:
* ( 0xc0000000UL )
*/
#define PHYS_OFFSET (0x40000000UL)
#define PHYS_OFFSET UL(0x40000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_MMU_H
#define __ASM_ARCH_MMU_H
#define PHYS_OFFSET (0x08000000UL)
#define PHYS_OFFSET UL(0x08000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -23,8 +23,8 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x00000000UL)
#define BUS_OFFSET (0x80000000UL)
#define PHYS_OFFSET UL(0x00000000)
#define BUS_OFFSET UL(0x80000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -12,9 +12,9 @@
* Physical DRAM offset.
*/
#ifndef CONFIG_ARCH_IOP331
#define PHYS_OFFSET (0xa0000000UL)
#define PHYS_OFFSET UL(0xa0000000)
#else
#define PHYS_OFFSET (0x00000000UL)
#define PHYS_OFFSET UL(0x00000000)
#endif
/*
......
......@@ -13,7 +13,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET (0x00000000UL)
#define PHYS_OFFSET UL(0x00000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -15,40 +15,40 @@
#ifndef __ASSEMBLY__
static inline unsigned long ixp2000_reg_read(volatile void *reg)
{
return *((volatile unsigned long *)reg);
}
static inline void ixp2000_reg_write(volatile void *reg, unsigned long val)
{
*((volatile unsigned long *)reg) = val;
}
/*
* The IXP2400 B0 silicon contains an erratum (#66) that causes writes
* to on-chip I/O register to not complete fully. What this means is
* that if you have a write to on-chip I/O followed by a back-to-back
* read or write, the first write will happen twice. OR...if it's
* not a back-to-back transaction, the read or write will generate
* incorrect data.
*
* The official work around for this is to set the on-chip I/O regions
* as XCB=101 and then force a read-back from the register.
* On the IXP2400, we can't use XCB=000 due to chip bugs. We use
* XCB=101 instead, but that makes all I/O accesses bufferable. This
* is not a problem in general, but we do have to be slightly more
* careful because I/O writes are no longer automatically flushed out
* of the write buffer.
*
* In cases where we want to make sure that a write has been flushed
* out of the write buffer before we proceed, for example when masking
* a device interrupt before re-enabling IRQs in CPSR, we can use this
* function, ixp2000_reg_wrb, which performs a write, a readback, and
* issues a dummy instruction dependent on the value of the readback
* (mov rX, rX) to make sure that the readback has completed before we
* continue.
*/
#if defined(CONFIG_ARCH_ENP2611) || defined(CONFIG_ARCH_IXDP2400) || defined(CONFIG_ARCH_IXDP2401)
#include <asm/system.h> /* Pickup local_irq_ functions */
static inline void ixp2000_reg_write(volatile void *reg, unsigned long val)
static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val)
{
unsigned long dummy;
unsigned long flags;
local_irq_save(flags);
*((volatile unsigned long *)reg) = val;
barrier();
dummy = *((volatile unsigned long *)reg);
local_irq_restore(flags);
}
#else
static inline void ixp2000_reg_write(volatile void *reg, unsigned long val)
{
*((volatile unsigned long *)reg) = val;
__asm__ __volatile__("mov %0, %0" : "+r" (dummy));
}
#endif /* IXDP2400 || IXDP2401 */
#define ixp2000_reg_read(reg) (*((volatile unsigned long *)reg))
/*
* Boards may multiplex different devices on the 2nd channel of
......
......@@ -36,11 +36,11 @@
*
* 0x6000000 0x00004000 ioremap'd QMgr
*
* 0xC0000000 0x00001000 0xffbfe000 PCI CFG
* 0xC0000000 0x00001000 0xffbff000 PCI CFG
*
* 0xC4000000 0x00001000 0xffbfd000 EXP CFG
* 0xC4000000 0x00001000 0xffbfe000 EXP CFG
*
* 0xC8000000 0x0000C000 0xffbf2000 On-Chip Peripherals
* 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals
*/
/*
......@@ -52,22 +52,22 @@
* Expansion BUS Configuration registers
*/
#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000)
#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFD000)
#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000)
#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000)
/*
* PCI Config registers
*/
#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000)
#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFE000)
#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000)
#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000)
/*
* Peripheral space
*/
#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000)
#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000)
#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000)
#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
/*
* Debug UART
......@@ -115,25 +115,48 @@
/*
* Peripheral Space Register Region Base Addresses
*/
#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000)
#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000)
#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000)
#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000)
#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000)
#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000)
#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000)
#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000)
#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000)
#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000)
#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000)
#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000)
#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000)
#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000)
#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000)
#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000)
#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000)
#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000)
#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000)
#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000)
#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000)
#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000)
#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000)
#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000)
#define IXP4XX_NPEA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000)
#define IXP4XX_NPEB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000)
#define IXP4XX_NPEC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000)
#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000)
#define IXP4XX_EthC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000)
#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000)
/* ixp46X only */
#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xC000)
#define IXP4XX_EthB1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xD000)
#define IXP4XX_EthB2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xE000)
#define IXP4XX_EthB3_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xF000)
#define IXP4XX_TIMESYNC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x10000)
#define IXP4XX_I2C_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x11000)
#define IXP4XX_SSP_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x12000)
#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000)
#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000)
#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000)
#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000)
#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000)
#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000)
#define IXP4XX_NPEA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000)
#define IXP4XX_NPEB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000)
#define IXP4XX_NPEC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000)
#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000)
#define IXP4XX_EthC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000)
#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000)
/* ixp46X only */
#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xC000)
#define IXP4XX_EthB1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xD000)
#define IXP4XX_EthB2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xE000)
#define IXP4XX_EthB3_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xF000)
#define IXP4XX_TIMESYNC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x10000)
#define IXP4XX_I2C_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x11000)
#define IXP4XX_SSP_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x12000)
/*
* Constants to make it easy to access Interrupt Controller registers
......
......@@ -12,7 +12,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x00000000UL)
#define PHYS_OFFSET UL(0x00000000)
#ifndef __ASSEMBLY__
......
......@@ -15,7 +15,7 @@
/*
* Physical DRAM offset on the L7200 SDB.
*/
#define PHYS_OFFSET (0xf0000000UL)
#define PHYS_OFFSET UL(0xf0000000)
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
......
......@@ -17,7 +17,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0xc0000000UL)
#define PHYS_OFFSET UL(0xc0000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -37,9 +37,9 @@
* Physical DRAM offset.
*/
#if defined(CONFIG_ARCH_OMAP1)
#define PHYS_OFFSET (0x10000000UL)
#define PHYS_OFFSET UL(0x10000000)
#elif defined(CONFIG_ARCH_OMAP2)
#define PHYS_OFFSET (0x80000000UL)
#define PHYS_OFFSET UL(0x80000000)
#endif
/*
......@@ -66,7 +66,7 @@
/*
* OMAP-1510 Local Bus address offset
*/
#define OMAP1510_LB_OFFSET (0x30000000UL)
#define OMAP1510_LB_OFFSET UL(0x30000000)
#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
......
......@@ -15,7 +15,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0xa0000000UL)
#define PHYS_OFFSET UL(0xa0000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -21,7 +21,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x10000000UL)
#define PHYS_OFFSET UL(0x10000000)
/*
* These are exactly the same on the RiscPC as the
......
......@@ -28,9 +28,9 @@
* and at 0x0C000000 for S3C2400
*/
#ifdef CONFIG_CPU_S3C2400
#define PHYS_OFFSET (0x0C000000UL)
#define PHYS_OFFSET UL(0x0C000000)
#else
#define PHYS_OFFSET (0x30000000UL)
#define PHYS_OFFSET UL(0x30000000)
#endif
/*
......
......@@ -13,7 +13,7 @@
/*
* Physical DRAM offset is 0xc0000000 on the SA1100
*/
#define PHYS_OFFSET (0xc0000000UL)
#define PHYS_OFFSET UL(0xc0000000)
#ifndef __ASSEMBLY__
......
......@@ -15,7 +15,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x08000000UL)
#define PHYS_OFFSET UL(0x08000000)
#ifndef __ASSEMBLY__
......
......@@ -23,7 +23,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x00000000UL)
#define PHYS_OFFSET UL(0x00000000)
/*
* Virtual view <-> DMA view memory address translations
......
......@@ -50,6 +50,7 @@ struct machine_desc {
*/
#define MACHINE_START(_type,_name) \
static const struct machine_desc __mach_desc_##_type \
__attribute_used__ \
__attribute__((__section__(".arch.info.init"))) = { \
.nr = MACH_TYPE_##_type, \
.name = _name,
......
......@@ -14,6 +14,7 @@ struct mtd_partition;
/*
* map_name: the map probe function name
* name: flash device name (eg, as used with mtdparts=)
* width: width of mapped device
* init: method called at driver/device initialisation
* exit: method called at driver/device removal
......@@ -23,6 +24,7 @@ struct mtd_partition;
*/
struct flash_platform_data {
const char *map_name;
const char *name;
unsigned int width;
int (*init)(void);
void (*exit)(void);
......
......@@ -27,8 +27,8 @@ struct meminfo;
#define MT_ROM 6
#define MT_IXP2000_DEVICE 7
#define __phys_to_pfn(paddr) (paddr >> PAGE_SHIFT)
#define __pfn_to_phys(pfn) (pfn << PAGE_SHIFT)
#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT)
#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT)
extern void create_memmap_holes(struct meminfo *);
extern void memtable_init(struct meminfo *);
......
......@@ -12,6 +12,16 @@
#ifndef __ASM_ARM_MEMORY_H
#define __ASM_ARM_MEMORY_H
/*
* Allow for constants defined here to be used from assembly code
* by prepending the UL suffix only with actual C code compilation.
*/
#ifndef __ASSEMBLY__
#define UL(x) (x##UL)
#else
#define UL(x) (x)
#endif
#include <linux/config.h>
#include <linux/compiler.h>
#include <asm/arch/memory.h>
......@@ -21,20 +31,20 @@
* TASK_SIZE - the maximum size of a user space task.
* TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
*/
#define TASK_SIZE (0xbf000000UL)
#define TASK_UNMAPPED_BASE (0x40000000UL)
#define TASK_SIZE UL(0xbf000000)
#define TASK_UNMAPPED_BASE UL(0x40000000)
#endif
/*
* The maximum size of a 26-bit user space task.
*/
#define TASK_SIZE_26 (0x04000000UL)
#define TASK_SIZE_26 UL(0x04000000)
/*
* Page offset: 3GB
*/
#ifndef PAGE_OFFSET
#define PAGE_OFFSET (0xc0000000UL)
#define PAGE_OFFSET UL(0xc0000000)
#endif
/*
......@@ -58,6 +68,13 @@
#error Top of user space clashes with start of module space
#endif
/*
* The XIP kernel gets mapped at the bottom of the module vm area.
* Since we use sections to map it, this macro replaces the physical address
* with its virtual address while keeping offset from the base section.
*/
#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff))
#ifndef __ASSEMBLY__
/*
......
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