Commit c199ce4f authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by David S. Miller

net: Fix misspellings of "configure" and "configuration"

Fix various misspellings of "configuration" and "configure".
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarKalle Valo <kvalo@codeaurora.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent f0d532c4
...@@ -175,7 +175,7 @@ static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, ...@@ -175,7 +175,7 @@ static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer,
* @port_buffer: <output> port receive buffer configuration * @port_buffer: <output> port receive buffer configuration
* @change: <output> * @change: <output>
* *
* Update buffer configuration based on pfc configuraiton and * Update buffer configuration based on pfc configuration and
* priority to buffer mapping. * priority to buffer mapping.
* Buffer's lossy bit is changed to: * Buffer's lossy bit is changed to:
* lossless if there is at least one PFC enabled priority * lossless if there is at least one PFC enabled priority
......
...@@ -37,14 +37,14 @@ ...@@ -37,14 +37,14 @@
#include <linux/slab.h> #include <linux/slab.h>
#include "qed.h" #include "qed.h"
/* Fields of IGU PF CONFIGRATION REGISTER */ /* Fields of IGU PF CONFIGURATION REGISTER */
#define IGU_PF_CONF_FUNC_EN (0x1 << 0) /* function enable */ #define IGU_PF_CONF_FUNC_EN (0x1 << 0) /* function enable */
#define IGU_PF_CONF_MSI_MSIX_EN (0x1 << 1) /* MSI/MSIX enable */ #define IGU_PF_CONF_MSI_MSIX_EN (0x1 << 1) /* MSI/MSIX enable */
#define IGU_PF_CONF_INT_LINE_EN (0x1 << 2) /* INT enable */ #define IGU_PF_CONF_INT_LINE_EN (0x1 << 2) /* INT enable */
#define IGU_PF_CONF_ATTN_BIT_EN (0x1 << 3) /* attention enable */ #define IGU_PF_CONF_ATTN_BIT_EN (0x1 << 3) /* attention enable */
#define IGU_PF_CONF_SINGLE_ISR_EN (0x1 << 4) /* single ISR mode enable */ #define IGU_PF_CONF_SINGLE_ISR_EN (0x1 << 4) /* single ISR mode enable */
#define IGU_PF_CONF_SIMD_MODE (0x1 << 5) /* simd all ones mode */ #define IGU_PF_CONF_SIMD_MODE (0x1 << 5) /* simd all ones mode */
/* Fields of IGU VF CONFIGRATION REGISTER */ /* Fields of IGU VF CONFIGURATION REGISTER */
#define IGU_VF_CONF_FUNC_EN (0x1 << 0) /* function enable */ #define IGU_VF_CONF_FUNC_EN (0x1 << 0) /* function enable */
#define IGU_VF_CONF_MSI_MSIX_EN (0x1 << 1) /* MSI/MSIX enable */ #define IGU_VF_CONF_MSI_MSIX_EN (0x1 << 1) /* MSI/MSIX enable */
#define IGU_VF_CONF_SINGLE_ISR_EN (0x1 << 4) /* single ISR mode enable */ #define IGU_VF_CONF_SINGLE_ISR_EN (0x1 << 4) /* single ISR mode enable */
......
...@@ -305,7 +305,7 @@ void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn, ...@@ -305,7 +305,7 @@ void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn,
/** /**
* @brief Read sriov related information and allocated resources * @brief Read sriov related information and allocated resources
* reads from configuraiton space, shmem, etc. * reads from configuration space, shmem, etc.
* *
* @param p_hwfn * @param p_hwfn
* *
......
...@@ -1298,7 +1298,7 @@ void qede_config_rx_mode(struct net_device *ndev) ...@@ -1298,7 +1298,7 @@ void qede_config_rx_mode(struct net_device *ndev)
rx_mode.type = QED_FILTER_TYPE_RX_MODE; rx_mode.type = QED_FILTER_TYPE_RX_MODE;
/* Remove all previous unicast secondary macs and multicast macs /* Remove all previous unicast secondary macs and multicast macs
* (configrue / leave the primary mac) * (configure / leave the primary mac)
*/ */
rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE, rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
edev->ndev->dev_addr); edev->ndev->dev_addr);
......
...@@ -1037,7 +1037,7 @@ static void ar9003_hw_configpcipowersave(struct ath_hw *ah, ...@@ -1037,7 +1037,7 @@ static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
} }
/* /*
* Configire PCIE after Ini init. SERDES values now come from ini file * Configure PCIE after Ini init. SERDES values now come from ini file
* This enables PCIe low power mode. * This enables PCIe low power mode.
*/ */
array = power_off ? &ah->iniPcieSerdes : array = power_off ? &ah->iniPcieSerdes :
......
...@@ -148,7 +148,7 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(struct iwl_trans *trans, ...@@ -148,7 +148,7 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(struct iwl_trans *trans,
* *
* Bits 3:0: * Bits 3:0:
* Define the maximum number of pending read requests. * Define the maximum number of pending read requests.
* Maximum configration value allowed is 0xC * Maximum configuration value allowed is 0xC
* Bits 9:8: * Bits 9:8:
* Define the maximum transfer size. (64 / 128 / 256) * Define the maximum transfer size. (64 / 128 / 256)
* Bit 10: * Bit 10:
......
...@@ -186,7 +186,7 @@ static void wl12xx_spi_init(struct device *child) ...@@ -186,7 +186,7 @@ static void wl12xx_spi_init(struct device *child)
spi_sync(to_spi_device(glue->dev), &m); spi_sync(to_spi_device(glue->dev), &m);
/* Restore chip select configration to normal */ /* Restore chip select configuration to normal */
spi->mode ^= SPI_CS_HIGH; spi->mode ^= SPI_CS_HIGH;
kfree(cmd); kfree(cmd);
} }
......
...@@ -286,7 +286,7 @@ struct dcbmsg { ...@@ -286,7 +286,7 @@ struct dcbmsg {
* @DCB_CMD_GNUMTCS: get the number of traffic classes currently supported * @DCB_CMD_GNUMTCS: get the number of traffic classes currently supported
* @DCB_CMD_SNUMTCS: set the number of traffic classes * @DCB_CMD_SNUMTCS: set the number of traffic classes
* @DCB_CMD_GBCN: set backward congestion notification configuration * @DCB_CMD_GBCN: set backward congestion notification configuration
* @DCB_CMD_SBCN: get backward congestion notification configration. * @DCB_CMD_SBCN: get backward congestion notification configuration.
* @DCB_CMD_GAPP: get application protocol configuration * @DCB_CMD_GAPP: get application protocol configuration
* @DCB_CMD_SAPP: set application protocol configuration * @DCB_CMD_SAPP: set application protocol configuration
* @DCB_CMD_IEEE_SET: set IEEE 802.1Qaz configuration * @DCB_CMD_IEEE_SET: set IEEE 802.1Qaz configuration
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment