drm/omap: move dispc related dss-feat funcs to dispc

omapdrm still uses a few non-dispc functions: dss_feat_get_num_mgrs(),
dss_feat_get_num_ovls() and  dss_feat_get_supported_color_modes(). We
want to provide omapdrm a single dispc_ops function pointer struct so
that omapdrm will use either the current omapdss or the new omapdss6
driver depending on the platform.

Those three functions are really dispc functions, but are located in the
dss_features.c for legacy reasons.

This patch adds similar functionss to the dispc, and changes omapdrm to
use those new functions. Underneath the functions still call the
functions from dss_feature.c.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

drivers/gpu/drm/omapdrm/dss/dispc.c

@@ -1135,6 +1135,18 @@ static u32 dispc_ovl_get_burst_size(enum omap_plane plane)
 	return unit * 8;
 }
 
+enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane plane)
+{
+	return dss_feat_get_supported_color_modes(plane);
+}
+EXPORT_SYMBOL(dispc_ovl_get_color_modes);
+
+int dispc_get_num_ovls(void)
+{
+	return dss_feat_get_num_ovls();
+}
+EXPORT_SYMBOL(dispc_get_num_ovls);
+
 static void dispc_mgr_enable_cpr(enum omap_channel channel, bool enable)
 {
 	if (channel == OMAP_DSS_CHANNEL_DIGIT)
@@ -2967,6 +2979,12 @@ void dispc_pck_free_enable(bool enable)
 	REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 27, 27);
 }
 
+int dispc_get_num_mgrs(void)
+{
+	return dss_feat_get_num_mgrs();
+}
+EXPORT_SYMBOL(dispc_get_num_mgrs);
+
 static void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable)
 {
 	mgr_fld_write(channel, DISPC_MGR_FLD_FIFOHANDCHECK, enable);

drivers/gpu/drm/omapdrm/dss/dss_features.c

@@ -774,13 +774,11 @@ int dss_feat_get_num_mgrs(void)
 {
 	return omap_current_dss_features->num_mgrs;
 }
-EXPORT_SYMBOL(dss_feat_get_num_mgrs);
 
 int dss_feat_get_num_ovls(void)
 {
 	return omap_current_dss_features->num_ovls;
 }
-EXPORT_SYMBOL(dss_feat_get_num_ovls);
 
 unsigned long dss_feat_get_param_min(enum dss_range_param param)
 {
@@ -806,7 +804,6 @@ enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
 {
 	return omap_current_dss_features->supported_color_modes[plane];
 }
-EXPORT_SYMBOL(dss_feat_get_supported_color_modes);
 
 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
 {

drivers/gpu/drm/omapdrm/dss/dss_features.h

@@ -104,4 +104,8 @@ void dss_features_init(enum omapdss_version version);
 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
 
+int dss_feat_get_num_mgrs(void);
+int dss_feat_get_num_ovls(void);
+enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
+
 #endif

drivers/gpu/drm/omapdrm/dss/omapdss.h

@@ -860,6 +860,9 @@ void dispc_free_irq(void *dev_id);
 int dispc_runtime_get(void);
 void dispc_runtime_put(void);
 
+int dispc_get_num_ovls(void);
+int dispc_get_num_mgrs(void);
+
 void dispc_mgr_enable(enum omap_channel channel, bool enable);
 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
@@ -872,6 +875,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
 		const struct videomode *vm);
 void dispc_mgr_setup(enum omap_channel channel,
 		const struct omap_overlay_manager_info *info);
+enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel);
 u32 dispc_mgr_gamma_size(enum omap_channel channel);
 void dispc_mgr_set_gamma(enum omap_channel channel,
 			 const struct drm_color_lut *lut,
@@ -883,6 +887,7 @@ void dispc_ovl_set_channel_out(enum omap_plane plane,
 		enum omap_channel channel);
 int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
 		bool replication, const struct videomode *vm, bool mem_to_mem);
+enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane plane);
 
 enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel);
 

drivers/gpu/drm/omapdrm/omap_drv.c

@@ -320,8 +320,8 @@ static int omap_modeset_init(struct drm_device *dev)
 {
 	struct omap_drm_private *priv = dev->dev_private;
 	struct omap_dss_device *dssdev = NULL;
-	int num_ovls = dss_feat_get_num_ovls();
-	int num_mgrs = dss_feat_get_num_mgrs();
+	int num_ovls = dispc_get_num_ovls();
+	int num_mgrs = dispc_get_num_mgrs();
 	int num_crtcs;
 	int i, id = 0;
 	int ret;

drivers/gpu/drm/omapdrm/omap_irq.c

@@ -249,7 +249,7 @@ static const u32 omap_underflow_irqs[] = {
 int omap_drm_irq_install(struct drm_device *dev)
 {
 	struct omap_drm_private *priv = dev->dev_private;
-	unsigned int num_mgrs = dss_feat_get_num_mgrs();
+	unsigned int num_mgrs = dispc_get_num_mgrs();
 	unsigned int max_planes;
 	unsigned int i;
 	int ret;

drivers/gpu/drm/omapdrm/omap_plane.c

@@ -352,7 +352,7 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
 
 	omap_plane->nformats = omap_framebuffer_get_formats(
 			omap_plane->formats, ARRAY_SIZE(omap_plane->formats),
-			dss_feat_get_supported_color_modes(id));
+			dispc_ovl_get_color_modes(id));
 	omap_plane->id = id;
 	omap_plane->name = plane_names[id];