Commit c325b353 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'pinctrl-v4.10-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:
 "Another week, another set of pin control fixes. The subsystem has seen
  high patch-spot activity recently.

  The majority of the patches are for Intel, I vaguely think it mostly
  concern phones, tablets and maybe chromebooks and even laptops with
  this Intel Atom family chips.

  Driver fixes only:

   - one fix to the Berlin driver making the SD card work fully again.

   - one fix to the Allwinner/sunxi bias function: one premature change
     needs to be partially reverted.

   - the remaining four patches are to Intel embedded SoCs: baytrail
     (three patches) and merrifield (one patch): register access
     debounce fixes and a missing spinlock"

* tag 'pinctrl-v4.10-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: baytrail: Add missing spinlock usage in byt_gpio_irq_handler
  pinctrl: baytrail: Debounce register is one per community
  pinctrl: baytrail: Rectify debounce support (part 2)
  pinctrl: intel: merrifield: Add missed check in mrfld_config_set()
  pinctrl: sunxi: Don't enforce bias disable (for now)
  pinctrl: berlin-bg4ct: fix the value for "sd1a" of pin SCRD0_CRD_PRES
parents a2ca3d61 cdca06e4
...@@ -217,7 +217,7 @@ static const struct berlin_desc_group berlin4ct_soc_pinctrl_groups[] = { ...@@ -217,7 +217,7 @@ static const struct berlin_desc_group berlin4ct_soc_pinctrl_groups[] = {
BERLIN_PINCTRL_GROUP("SCRD0_CRD_PRES", 0xc, 0x3, 0x15, BERLIN_PINCTRL_GROUP("SCRD0_CRD_PRES", 0xc, 0x3, 0x15,
BERLIN_PINCTRL_FUNCTION(0x0, "gpio"), /* GPIO20 */ BERLIN_PINCTRL_FUNCTION(0x0, "gpio"), /* GPIO20 */
BERLIN_PINCTRL_FUNCTION(0x1, "scrd0"), /* crd pres */ BERLIN_PINCTRL_FUNCTION(0x1, "scrd0"), /* crd pres */
BERLIN_PINCTRL_FUNCTION(0x1, "sd1a")), /* DAT3 */ BERLIN_PINCTRL_FUNCTION(0x3, "sd1a")), /* DAT3 */
BERLIN_PINCTRL_GROUP("SPI1_SS0n", 0xc, 0x3, 0x18, BERLIN_PINCTRL_GROUP("SPI1_SS0n", 0xc, 0x3, 0x18,
BERLIN_PINCTRL_FUNCTION(0x0, "spi1"), /* SS0n */ BERLIN_PINCTRL_FUNCTION(0x0, "spi1"), /* SS0n */
BERLIN_PINCTRL_FUNCTION(0x1, "gpio"), /* GPIO37 */ BERLIN_PINCTRL_FUNCTION(0x1, "gpio"), /* GPIO37 */
......
...@@ -731,16 +731,23 @@ static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset, ...@@ -731,16 +731,23 @@ static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset,
int reg) int reg)
{ {
struct byt_community *comm = byt_get_community(vg, offset); struct byt_community *comm = byt_get_community(vg, offset);
u32 reg_offset = 0; u32 reg_offset;
if (!comm) if (!comm)
return NULL; return NULL;
offset -= comm->pin_base; offset -= comm->pin_base;
if (reg == BYT_INT_STAT_REG) switch (reg) {
case BYT_INT_STAT_REG:
reg_offset = (offset / 32) * 4; reg_offset = (offset / 32) * 4;
else break;
case BYT_DEBOUNCE_REG:
reg_offset = 0;
break;
default:
reg_offset = comm->pad_map[offset] * 16; reg_offset = comm->pad_map[offset] * 16;
break;
}
return comm->reg_base + reg_offset + reg; return comm->reg_base + reg_offset + reg;
} }
...@@ -1243,10 +1250,12 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, ...@@ -1243,10 +1250,12 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
debounce = readl(db_reg); debounce = readl(db_reg);
debounce &= ~BYT_DEBOUNCE_PULSE_MASK; debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
if (arg)
conf |= BYT_DEBOUNCE_EN;
else
conf &= ~BYT_DEBOUNCE_EN;
switch (arg) { switch (arg) {
case 0:
conf &= BYT_DEBOUNCE_EN;
break;
case 375: case 375:
debounce |= BYT_DEBOUNCE_PULSE_375US; debounce |= BYT_DEBOUNCE_PULSE_375US;
break; break;
...@@ -1269,7 +1278,9 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, ...@@ -1269,7 +1278,9 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
debounce |= BYT_DEBOUNCE_PULSE_24MS; debounce |= BYT_DEBOUNCE_PULSE_24MS;
break; break;
default: default:
ret = -EINVAL; if (arg)
ret = -EINVAL;
break;
} }
if (!ret) if (!ret)
...@@ -1612,7 +1623,9 @@ static void byt_gpio_irq_handler(struct irq_desc *desc) ...@@ -1612,7 +1623,9 @@ static void byt_gpio_irq_handler(struct irq_desc *desc)
continue; continue;
} }
raw_spin_lock(&vg->lock);
pending = readl(reg); pending = readl(reg);
raw_spin_unlock(&vg->lock);
for_each_set_bit(pin, &pending, 32) { for_each_set_bit(pin, &pending, 32) {
virq = irq_find_mapping(vg->chip.irqdomain, base + pin); virq = irq_find_mapping(vg->chip.irqdomain, base + pin);
generic_handle_irq(virq); generic_handle_irq(virq);
......
...@@ -794,6 +794,9 @@ static int mrfld_config_set(struct pinctrl_dev *pctldev, unsigned int pin, ...@@ -794,6 +794,9 @@ static int mrfld_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
unsigned int i; unsigned int i;
int ret; int ret;
if (!mrfld_buf_available(mp, pin))
return -ENOTSUPP;
for (i = 0; i < nconfigs; i++) { for (i = 0; i < nconfigs; i++) {
switch (pinconf_to_config_param(configs[i])) { switch (pinconf_to_config_param(configs[i])) {
case PIN_CONFIG_BIAS_DISABLE: case PIN_CONFIG_BIAS_DISABLE:
......
...@@ -564,8 +564,7 @@ static int sunxi_pconf_group_set(struct pinctrl_dev *pctldev, ...@@ -564,8 +564,7 @@ static int sunxi_pconf_group_set(struct pinctrl_dev *pctldev,
val = arg / 10 - 1; val = arg / 10 - 1;
break; break;
case PIN_CONFIG_BIAS_DISABLE: case PIN_CONFIG_BIAS_DISABLE:
val = 0; continue;
break;
case PIN_CONFIG_BIAS_PULL_UP: case PIN_CONFIG_BIAS_PULL_UP:
if (arg == 0) if (arg == 0)
return -EINVAL; return -EINVAL;
......
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