Commit c44eafd7 authored by Thierry Reding's avatar Thierry Reding Committed by Linus Walleij

gpio: Introduce struct gpio_irq_chip

This new structure will be used to group all fields related to interrupt
handling in a GPIO chip. Doing so will properly namespace these fields
and make it easier to distinguish which fields are used for IRQ support.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Acked-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent b53b8300
...@@ -19,6 +19,36 @@ struct module; ...@@ -19,6 +19,36 @@ struct module;
#ifdef CONFIG_GPIOLIB #ifdef CONFIG_GPIOLIB
#ifdef CONFIG_GPIOLIB_IRQCHIP
/**
* struct gpio_irq_chip - GPIO interrupt controller
*/
struct gpio_irq_chip {
/**
* @domain_ops:
*
* Table of interrupt domain operations for this IRQ chip.
*/
const struct irq_domain_ops *domain_ops;
/**
* @parent_handler:
*
* The interrupt handler for the GPIO chip's parent interrupts, may be
* NULL if the parent interrupts are nested rather than cascaded.
*/
irq_flow_handler_t parent_handler;
/**
* @parent_handler_data:
*
* Data associated, and passed to, the handler for the parent
* interrupt.
*/
void *parent_handler_data;
};
#endif
/** /**
* struct gpio_chip - abstract a GPIO controller * struct gpio_chip - abstract a GPIO controller
* @label: a functional name for the GPIO device, such as a part * @label: a functional name for the GPIO device, such as a part
...@@ -176,6 +206,14 @@ struct gpio_chip { ...@@ -176,6 +206,14 @@ struct gpio_chip {
bool irq_need_valid_mask; bool irq_need_valid_mask;
unsigned long *irq_valid_mask; unsigned long *irq_valid_mask;
struct lock_class_key *lock_key; struct lock_class_key *lock_key;
/**
* @irq:
*
* Integrates interrupt chip functionality with the GPIO chip. Can be
* used to handle IRQs for most practical cases.
*/
struct gpio_irq_chip irq;
#endif #endif
#if defined(CONFIG_OF_GPIO) #if defined(CONFIG_OF_GPIO)
......
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