Commit c466d997 authored by Boris Brezillon's avatar Boris Brezillon Committed by Gregory CLEMENT

ARM: mvebu: define crypto SRAM ranges for all armada-xp boards

Define the crypto SRAM ranges so that the resources referenced by the
sa-sram node can be properly extracted from the DT.
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent b2ee6b7b
...@@ -69,7 +69,9 @@ memory { ...@@ -69,7 +69,9 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -75,7 +75,9 @@ memory { ...@@ -75,7 +75,9 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>; MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
devbus-bootcs { devbus-bootcs {
status = "okay"; status = "okay";
......
...@@ -94,7 +94,9 @@ pm_pic { ...@@ -94,7 +94,9 @@ pm_pic {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>; MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
devbus-bootcs { devbus-bootcs {
status = "okay"; status = "okay";
......
...@@ -64,7 +64,9 @@ memory { ...@@ -64,7 +64,9 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -69,7 +69,9 @@ memory { ...@@ -69,7 +69,9 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -67,7 +67,9 @@ memory { ...@@ -67,7 +67,9 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
internal-regs { internal-regs {
serial@12000 { serial@12000 {
......
...@@ -63,7 +63,9 @@ memory { ...@@ -63,7 +63,9 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -65,7 +65,9 @@ memory { ...@@ -65,7 +65,9 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>; MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
devbus-bootcs { devbus-bootcs {
status = "okay"; status = "okay";
......
...@@ -77,7 +77,9 @@ memory { ...@@ -77,7 +77,9 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
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