Commit c5498089 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Mask everything in ring HWSTAM on gen6+ in ringbuffer mode

The execlist code already masks everything in the ring HWSTAM, but
the ringbuffer code doesn't. Let's go ahead and do that. Pre-gen6
platforms setup HWSTAM during irq setup already since there's just
the one register, and it also contains bits for non-ring interrupts.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170818183705.27850-13-ville.syrjala@linux.intel.comReviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 3dcf4f20
...@@ -428,6 +428,9 @@ static void intel_ring_setup_status_page(struct intel_engine_cs *engine) ...@@ -428,6 +428,9 @@ static void intel_ring_setup_status_page(struct intel_engine_cs *engine)
mmio = RING_HWS_PGA(engine->mmio_base); mmio = RING_HWS_PGA(engine->mmio_base);
} }
if (INTEL_GEN(dev_priv) >= 6)
I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
I915_WRITE(mmio, engine->status_page.ggtt_offset); I915_WRITE(mmio, engine->status_page.ggtt_offset);
POSTING_READ(mmio); POSTING_READ(mmio);
......
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