Commit c5b6c914 authored by Jiansong Chen's avatar Jiansong Chen Committed by Alex Deucher

drm/amdgpu: enable cp_fw_write_wait for navy_flounder

It's the same with sienna_cichlid, cp fw for navy_flounder
can support WAIT_REG_MEM packet.
Signed-off-by: default avatarJiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 290b4ad5
...@@ -3538,6 +3538,7 @@ static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev) ...@@ -3538,6 +3538,7 @@ static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev)
adev->gfx.cp_fw_write_wait = true; adev->gfx.cp_fw_write_wait = true;
break; break;
case CHIP_SIENNA_CICHLID: case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
adev->gfx.cp_fw_write_wait = true; adev->gfx.cp_fw_write_wait = true;
break; break;
default: default:
......
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