Commit c6ade4ee authored by David Francis's avatar David Francis Committed by Alex Deucher

drm/amd/display: On DCN1, Wait for vupdate on cursor updates

[Why]
Cursor updates must acquire the pipe control lock to
prevent vupdate from triggering in the middle of cursor
programming. On DCN1 the pipe control lock prevents
pageflips from occurring. This means that a cursor update
right before vupdate can delay a pending pageflip

[How]
If the time until the next vupdate is less than a
conservative estimate of the cursor programming time,
wait until the vupdate has passed before locking.
Signed-off-by: default avatarDavid Francis <David.Francis@amd.com>
Reviewed-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Acked-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0dcdcc89
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include "resource.h" #include "resource.h"
#include "ipp.h" #include "ipp.h"
#include "timing_generator.h" #include "timing_generator.h"
#include "dcn10/dcn10_hw_sequencer.h"
#define DC_LOGGER dc->ctx->logger #define DC_LOGGER dc->ctx->logger
...@@ -196,6 +197,32 @@ struct dc_stream_status *dc_stream_get_status( ...@@ -196,6 +197,32 @@ struct dc_stream_status *dc_stream_get_status(
return dc_stream_get_status_from_state(dc->current_state, stream); return dc_stream_get_status_from_state(dc->current_state, stream);
} }
static void delay_cursor_until_vupdate(struct pipe_ctx *pipe_ctx, struct dc *dc)
{
unsigned int vupdate_line;
unsigned int lines_to_vupdate, us_to_vupdate, vpos, nvpos;
struct dc_stream_state *stream = pipe_ctx->stream;
unsigned int us_per_line;
if (stream->ctx->asic_id.chip_family == FAMILY_RV &&
ASIC_REV_IS_RAVEN(stream->ctx->asic_id.hw_internal_rev)) {
vupdate_line = get_vupdate_offset_from_vsync(pipe_ctx);
dc_stream_get_crtc_position(dc, &stream, 1, &vpos, &nvpos);
if (vpos >= vupdate_line)
return;
us_per_line = stream->timing.h_total * 10000 / stream->timing.pix_clk_100hz;
lines_to_vupdate = vupdate_line - vpos;
us_to_vupdate = lines_to_vupdate * us_per_line;
/* 70 us is a conservative estimate of cursor update time*/
if (us_to_vupdate < 70)
udelay(us_to_vupdate);
}
}
/** /**
* dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address
*/ */
...@@ -234,6 +261,8 @@ bool dc_stream_set_cursor_attributes( ...@@ -234,6 +261,8 @@ bool dc_stream_set_cursor_attributes(
if (!pipe_to_program) { if (!pipe_to_program) {
pipe_to_program = pipe_ctx; pipe_to_program = pipe_ctx;
delay_cursor_until_vupdate(pipe_ctx, core_dc);
core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true); core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true);
} }
...@@ -283,6 +312,8 @@ bool dc_stream_set_cursor_position( ...@@ -283,6 +312,8 @@ bool dc_stream_set_cursor_position(
if (!pipe_to_program) { if (!pipe_to_program) {
pipe_to_program = pipe_ctx; pipe_to_program = pipe_ctx;
delay_cursor_until_vupdate(pipe_ctx, core_dc);
core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true); core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true);
} }
......
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