Commit c6fe0ad2 authored by Brandon Streiff's avatar Brandon Streiff Committed by David S. Miller

net: dsa: mv88e6xxx: add rx/tx timestamping support

This patch implements RX/TX timestamping support.

The Marvell PTP hardware supports RX timestamping individual message
types, but for simplicity we only support the EVENT receive filter since
few if any clients bother with the more specific filter types.

checkpatch and reverse Christmas tree changes by Andrew Lunn.

Re-factor duplicated code paths and avoid IfOk anti-pattern, use the
common ptp worker thread from the class layer and time stamp UDP/IPv4
frames as well as Layer-2 frame by Richard Cochran.
Signed-off-by: default avatarBrandon Streiff <brandon.streiff@ni.com>
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarRichard Cochran <richardcochran@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 90af1059
...@@ -7,6 +7,7 @@ mv88e6xxx-objs += global1_vtu.o ...@@ -7,6 +7,7 @@ mv88e6xxx-objs += global1_vtu.o
mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2.o mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2.o
mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2_avb.o mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2_avb.o
mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2_scratch.o mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2_scratch.o
mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += hwtstamp.o
mv88e6xxx-objs += phy.o mv88e6xxx-objs += phy.o
mv88e6xxx-objs += port.o mv88e6xxx-objs += port.o
mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += ptp.o mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += ptp.o
......
...@@ -36,6 +36,7 @@ ...@@ -36,6 +36,7 @@
#include "chip.h" #include "chip.h"
#include "global1.h" #include "global1.h"
#include "global2.h" #include "global2.h"
#include "hwtstamp.h"
#include "phy.h" #include "phy.h"
#include "port.h" #include "port.h"
#include "ptp.h" #include "ptp.h"
...@@ -2093,11 +2094,15 @@ static int mv88e6xxx_setup(struct dsa_switch *ds) ...@@ -2093,11 +2094,15 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
if (err) if (err)
goto unlock; goto unlock;
/* Setup PTP Hardware Clock */ /* Setup PTP Hardware Clock and timestamping */
if (chip->info->ptp_support) { if (chip->info->ptp_support) {
err = mv88e6xxx_ptp_setup(chip); err = mv88e6xxx_ptp_setup(chip);
if (err) if (err)
goto unlock; goto unlock;
err = mv88e6xxx_hwtstamp_setup(chip);
if (err)
goto unlock;
} }
unlock: unlock:
...@@ -3932,6 +3937,11 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = { ...@@ -3932,6 +3937,11 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
.port_mdb_del = mv88e6xxx_port_mdb_del, .port_mdb_del = mv88e6xxx_port_mdb_del,
.crosschip_bridge_join = mv88e6xxx_crosschip_bridge_join, .crosschip_bridge_join = mv88e6xxx_crosschip_bridge_join,
.crosschip_bridge_leave = mv88e6xxx_crosschip_bridge_leave, .crosschip_bridge_leave = mv88e6xxx_crosschip_bridge_leave,
.port_hwtstamp_set = mv88e6xxx_port_hwtstamp_set,
.port_hwtstamp_get = mv88e6xxx_port_hwtstamp_get,
.port_txtstamp = mv88e6xxx_port_txtstamp,
.port_rxtstamp = mv88e6xxx_port_rxtstamp,
.get_ts_info = mv88e6xxx_get_ts_info,
}; };
static struct dsa_switch_driver mv88e6xxx_switch_drv = { static struct dsa_switch_driver mv88e6xxx_switch_drv = {
...@@ -4074,8 +4084,10 @@ static void mv88e6xxx_remove(struct mdio_device *mdiodev) ...@@ -4074,8 +4084,10 @@ static void mv88e6xxx_remove(struct mdio_device *mdiodev)
struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev);
struct mv88e6xxx_chip *chip = ds->priv; struct mv88e6xxx_chip *chip = ds->priv;
if (chip->info->ptp_support) if (chip->info->ptp_support) {
mv88e6xxx_hwtstamp_free(chip);
mv88e6xxx_ptp_free(chip); mv88e6xxx_ptp_free(chip);
}
mv88e6xxx_phy_destroy(chip); mv88e6xxx_phy_destroy(chip);
mv88e6xxx_unregister_switch(chip); mv88e6xxx_unregister_switch(chip);
......
...@@ -164,6 +164,32 @@ struct mv88e6xxx_irq { ...@@ -164,6 +164,32 @@ struct mv88e6xxx_irq {
unsigned int nirqs; unsigned int nirqs;
}; };
/* state flags for mv88e6xxx_port_hwtstamp::state */
enum {
MV88E6XXX_HWTSTAMP_ENABLED,
MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS,
};
struct mv88e6xxx_port_hwtstamp {
/* Port index */
int port_id;
/* Timestamping state */
unsigned long state;
/* Resources for receive timestamping */
struct sk_buff_head rx_queue;
struct sk_buff_head rx_queue2;
/* Resources for transmit timestamping */
unsigned long tx_tstamp_start;
struct sk_buff *tx_skb;
u16 tx_seq_id;
/* Current timestamp configuration */
struct hwtstamp_config tstamp_config;
};
struct mv88e6xxx_chip { struct mv88e6xxx_chip {
const struct mv88e6xxx_info *info; const struct mv88e6xxx_info *info;
...@@ -236,6 +262,9 @@ struct mv88e6xxx_chip { ...@@ -236,6 +262,9 @@ struct mv88e6xxx_chip {
struct ptp_pin_desc pin_config[MV88E6XXX_MAX_GPIO]; struct ptp_pin_desc pin_config[MV88E6XXX_MAX_GPIO];
u16 trig_config; u16 trig_config;
u16 evcap_config; u16 evcap_config;
/* Per-port timestamping resources. */
struct mv88e6xxx_port_hwtstamp port_hwtstamp[DSA_MAX_PORTS];
}; };
struct mv88e6xxx_bus_ops { struct mv88e6xxx_bus_ops {
......
This diff is collapsed.
/*
* Marvell 88E6xxx Switch hardware timestamping support
*
* Copyright (c) 2008 Marvell Semiconductor
*
* Copyright (c) 2017 National Instruments
* Erik Hons <erik.hons@ni.com>
* Brandon Streiff <brandon.streiff@ni.com>
* Dane Wagner <dane.wagner@ni.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef _MV88E6XXX_HWTSTAMP_H
#define _MV88E6XXX_HWTSTAMP_H
#include "chip.h"
/* Global PTP registers */
/* Offset 0x00: PTP EtherType */
#define MV88E6XXX_PTP_ETHERTYPE 0x00
/* Offset 0x01: Message Type Timestamp Enables */
#define MV88E6XXX_PTP_MSGTYPE 0x01
#define MV88E6XXX_PTP_MSGTYPE_SYNC 0x0001
#define MV88E6XXX_PTP_MSGTYPE_DELAY_REQ 0x0002
#define MV88E6XXX_PTP_MSGTYPE_PDLAY_REQ 0x0004
#define MV88E6XXX_PTP_MSGTYPE_PDLAY_RES 0x0008
#define MV88E6XXX_PTP_MSGTYPE_ALL_EVENT 0x000f
/* Offset 0x02: Timestamp Arrival Capture Pointers */
#define MV88E6XXX_PTP_TS_ARRIVAL_PTR 0x02
/* Offset 0x08: PTP Interrupt Status */
#define MV88E6XXX_PTP_IRQ_STATUS 0x08
/* Per-Port PTP Registers */
/* Offset 0x00: PTP Configuration 0 */
#define MV88E6XXX_PORT_PTP_CFG0 0x00
#define MV88E6XXX_PORT_PTP_CFG0_TSPEC_SHIFT 12
#define MV88E6XXX_PORT_PTP_CFG0_TSPEC_MASK 0xf000
#define MV88E6XXX_PORT_PTP_CFG0_TSPEC_1588 0x0000
#define MV88E6XXX_PORT_PTP_CFG0_TSPEC_8021AS 0x1000
#define MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH 0x0800
#define MV88E6XXX_PORT_PTP_CFG0_DISABLE_OVERWRITE 0x0002
#define MV88E6XXX_PORT_PTP_CFG0_DISABLE_PTP 0x0001
/* Offset 0x01: PTP Configuration 1 */
#define MV88E6XXX_PORT_PTP_CFG1 0x01
/* Offset 0x02: PTP Configuration 2 */
#define MV88E6XXX_PORT_PTP_CFG2 0x02
#define MV88E6XXX_PORT_PTP_CFG2_EMBED_ARRIVAL 0x1000
#define MV88E6XXX_PORT_PTP_CFG2_DEP_IRQ_EN 0x0002
#define MV88E6XXX_PORT_PTP_CFG2_ARR_IRQ_EN 0x0001
/* Offset 0x03: PTP LED Configuration */
#define MV88E6XXX_PORT_PTP_LED_CFG 0x03
/* Offset 0x08: PTP Arrival 0 Status */
#define MV88E6XXX_PORT_PTP_ARR0_STS 0x08
/* Offset 0x09/0x0A: PTP Arrival 0 Time */
#define MV88E6XXX_PORT_PTP_ARR0_TIME_LO 0x09
#define MV88E6XXX_PORT_PTP_ARR0_TIME_HI 0x0a
/* Offset 0x0B: PTP Arrival 0 Sequence ID */
#define MV88E6XXX_PORT_PTP_ARR0_SEQID 0x0b
/* Offset 0x0C: PTP Arrival 1 Status */
#define MV88E6XXX_PORT_PTP_ARR1_STS 0x0c
/* Offset 0x0D/0x0E: PTP Arrival 1 Time */
#define MV88E6XXX_PORT_PTP_ARR1_TIME_LO 0x0d
#define MV88E6XXX_PORT_PTP_ARR1_TIME_HI 0x0e
/* Offset 0x0F: PTP Arrival 1 Sequence ID */
#define MV88E6XXX_PORT_PTP_ARR1_SEQID 0x0f
/* Offset 0x10: PTP Departure Status */
#define MV88E6XXX_PORT_PTP_DEP_STS 0x10
/* Offset 0x11/0x12: PTP Deperture Time */
#define MV88E6XXX_PORT_PTP_DEP_TIME_LO 0x11
#define MV88E6XXX_PORT_PTP_DEP_TIME_HI 0x12
/* Offset 0x13: PTP Departure Sequence ID */
#define MV88E6XXX_PORT_PTP_DEP_SEQID 0x13
/* Status fields for arrival and depature timestamp status registers */
#define MV88E6XXX_PTP_TS_STATUS_MASK 0x0006
#define MV88E6XXX_PTP_TS_STATUS_NORMAL 0x0000
#define MV88E6XXX_PTP_TS_STATUS_OVERWITTEN 0x0002
#define MV88E6XXX_PTP_TS_STATUS_DISCARDED 0x0004
#define MV88E6XXX_PTP_TS_VALID 0x0001
#ifdef CONFIG_NET_DSA_MV88E6XXX_PTP
int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,
struct ifreq *ifr);
int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,
struct ifreq *ifr);
bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,
struct sk_buff *clone, unsigned int type);
bool mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,
struct sk_buff *clone, unsigned int type);
int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,
struct ethtool_ts_info *info);
int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip);
void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip);
#else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */
static inline int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds,
int port, struct ifreq *ifr)
{
return -EOPNOTSUPP;
}
static inline int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds,
int port, struct ifreq *ifr)
{
return -EOPNOTSUPP;
}
static inline bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,
struct sk_buff *clone,
unsigned int type)
{
return false;
}
static inline bool mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,
struct sk_buff *clone,
unsigned int type)
{
return false;
}
static inline int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,
struct ethtool_ts_info *info)
{
return -EOPNOTSUPP;
}
static inline int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip)
{
return 0;
}
static inline void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip)
{
}
#endif /* CONFIG_NET_DSA_MV88E6XXX_PTP */
#endif /* _MV88E6XXX_HWTSTAMP_H */
...@@ -27,8 +27,6 @@ ...@@ -27,8 +27,6 @@
#define TAI_EVENT_WORK_INTERVAL msecs_to_jiffies(100) #define TAI_EVENT_WORK_INTERVAL msecs_to_jiffies(100)
#define cc_to_chip(cc) container_of(cc, struct mv88e6xxx_chip, tstamp_cc) #define cc_to_chip(cc) container_of(cc, struct mv88e6xxx_chip, tstamp_cc)
#define ptp_to_chip(ptp) container_of(ptp, struct mv88e6xxx_chip, \
ptp_clock_info)
#define dw_overflow_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \ #define dw_overflow_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \
overflow_work) overflow_work)
#define dw_tai_event_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \ #define dw_tai_event_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \
...@@ -359,6 +357,7 @@ int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip) ...@@ -359,6 +357,7 @@ int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)
chip->ptp_clock_info.settime64 = mv88e6xxx_ptp_settime; chip->ptp_clock_info.settime64 = mv88e6xxx_ptp_settime;
chip->ptp_clock_info.enable = mv88e6xxx_ptp_enable; chip->ptp_clock_info.enable = mv88e6xxx_ptp_enable;
chip->ptp_clock_info.verify = mv88e6xxx_ptp_verify; chip->ptp_clock_info.verify = mv88e6xxx_ptp_verify;
chip->ptp_clock_info.do_aux_work = mv88e6xxx_hwtstamp_work;
chip->ptp_clock = ptp_clock_register(&chip->ptp_clock_info, chip->dev); chip->ptp_clock = ptp_clock_register(&chip->ptp_clock_info, chip->dev);
if (IS_ERR(chip->ptp_clock)) if (IS_ERR(chip->ptp_clock))
......
...@@ -80,11 +80,20 @@ ...@@ -80,11 +80,20 @@
#ifdef CONFIG_NET_DSA_MV88E6XXX_PTP #ifdef CONFIG_NET_DSA_MV88E6XXX_PTP
long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp);
int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip); int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip);
void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip); void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip);
#define ptp_to_chip(ptp) container_of(ptp, struct mv88e6xxx_chip, \
ptp_clock_info)
#else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */ #else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */
static long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp)
{
return -1;
}
static inline int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip) static inline int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)
{ {
return 0; return 0;
......
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