Commit c76f39bd authored by Luck, Tony's avatar Luck, Tony Committed by Linus Torvalds

ia64: fix futex_atomic_cmpxchg_inatomic()

Michel Lespinasse cleaned up the futex calling conventions in commit
37a9d912 ("futex: Sanitize cmpxchg_futex_value_locked API").

But the ia64 implementation was subtly broken.  Gcc does not know that
register "r8" will be updated by the fault handler if the cmpxchg
instruction takes an exception.  So it feels safe in letting the
initialization of r8 slide to after the cmpxchg.  Result: we always
return 0 whether the user address faulted or not.

Fix by moving the initialization of r8 into the __asm__ code so gcc
won't move it.

Reported-by: <emeric.maschino@gmail.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=42757
Tested-by: <emeric.maschino@gmail.com>
Acked-by: default avatarMichel Lespinasse <walken@google.com>
Cc: stable@vger.kernel.org # v2.6.39+
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent c06a9ebd
...@@ -106,15 +106,16 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, ...@@ -106,15 +106,16 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
return -EFAULT; return -EFAULT;
{ {
register unsigned long r8 __asm ("r8") = 0; register unsigned long r8 __asm ("r8");
unsigned long prev; unsigned long prev;
__asm__ __volatile__( __asm__ __volatile__(
" mf;; \n" " mf;; \n"
" mov ar.ccv=%3;; \n" " mov %0=r0 \n"
"[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n" " mov ar.ccv=%4;; \n"
"[1:] cmpxchg4.acq %1=[%2],%3,ar.ccv \n"
" .xdata4 \"__ex_table\", 1b-., 2f-. \n" " .xdata4 \"__ex_table\", 1b-., 2f-. \n"
"[2:]" "[2:]"
: "=r" (prev) : "=r" (r8), "=r" (prev)
: "r" (uaddr), "r" (newval), : "r" (uaddr), "r" (newval),
"rO" ((long) (unsigned) oldval) "rO" ((long) (unsigned) oldval)
: "memory"); : "memory");
......
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