Commit c7f9f9a8 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Use ring->flush() instead of MI_FLUSH

Use the ring abstraction to hide the details of having choose the
appropriate flushing method.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent e070868e
...@@ -1001,6 +1001,10 @@ void i915_gem_retire_requests(struct drm_device *dev); ...@@ -1001,6 +1001,10 @@ void i915_gem_retire_requests(struct drm_device *dev);
void i915_gem_reset_flushing_list(struct drm_device *dev); void i915_gem_reset_flushing_list(struct drm_device *dev);
void i915_gem_reset_inactive_gpu_domains(struct drm_device *dev); void i915_gem_reset_inactive_gpu_domains(struct drm_device *dev);
void i915_gem_clflush_object(struct drm_gem_object *obj); void i915_gem_clflush_object(struct drm_gem_object *obj);
void i915_gem_flush_ring(struct drm_device *dev,
struct intel_ring_buffer *ring,
uint32_t invalidate_domains,
uint32_t flush_domains);
int i915_gem_object_set_domain(struct drm_gem_object *obj, int i915_gem_object_set_domain(struct drm_gem_object *obj,
uint32_t read_domains, uint32_t read_domains,
uint32_t write_domain); uint32_t write_domain);
......
...@@ -1908,7 +1908,7 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno, ...@@ -1908,7 +1908,7 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno,
return i915_do_wait_request(dev, seqno, 1, ring); return i915_do_wait_request(dev, seqno, 1, ring);
} }
static void void
i915_gem_flush_ring(struct drm_device *dev, i915_gem_flush_ring(struct drm_device *dev,
struct intel_ring_buffer *ring, struct intel_ring_buffer *ring,
uint32_t invalidate_domains, uint32_t invalidate_domains,
......
...@@ -5056,24 +5056,23 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, ...@@ -5056,24 +5056,23 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
atomic_inc(&obj_priv->pending_flip); atomic_inc(&obj_priv->pending_flip);
work->pending_flip_obj = obj; work->pending_flip_obj = obj;
if (was_dirty || IS_GEN3(dev) || IS_GEN2(dev)) { /* Schedule the pipelined flush */
BEGIN_LP_RING(2); if (was_dirty)
if (IS_GEN3(dev) || IS_GEN2(dev)) { i915_gem_flush_ring(dev, obj_priv->ring, 0, was_dirty);
u32 flip_mask;
/* Can't queue multiple flips, so wait for the previous if (IS_GEN3(dev) || IS_GEN2(dev)) {
* one to finish before executing the next. u32 flip_mask;
*/
if (intel_crtc->plane) /* Can't queue multiple flips, so wait for the previous
flip_mask = MI_WAIT_FOR_PLANE_B_FLIP; * one to finish before executing the next.
else */
flip_mask = MI_WAIT_FOR_PLANE_A_FLIP; BEGIN_LP_RING(2);
if (intel_crtc->plane)
OUT_RING(MI_WAIT_FOR_EVENT | flip_mask); flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
} else else
OUT_RING(MI_NOOP); flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
OUT_RING(MI_FLUSH); OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);
OUT_RING(MI_NOOP);
ADVANCE_LP_RING(); ADVANCE_LP_RING();
} }
......
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