[PATCH] mips: mIPS Technologies board updates

Update the code for the three MIPS Technologies evaluation platforms.
Untangle the support for the three platforms, keep up with changes elsewhere
in the kernel and getting Atlas back to work even with the most esotheric
configurations.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

arch/mips/Kconfig

@@ -258,8 +258,10 @@ config IT8172_REVC
 
 config MIPS_ATLAS
 	bool "Support for MIPS Atlas board"
+	select BOOT_ELF32
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
+	select MIPS_GT64120
 	select SWAP_IO_SPACE
 	help
 	  This enables support for the QED R5231-based MIPS Atlas evaluation
@@ -267,9 +269,13 @@ config MIPS_ATLAS
 
 config MIPS_MALTA
 	bool "Support for MIPS Malta board"
+	select BOOT_ELF32
 	select HAVE_STD_PC_SERIAL_PORT
 	select DMA_NONCOHERENT
+	select GENERIC_ISA_DMA
 	select HW_HAS_PCI
+	select I8259
+	select MIPS_GT64120
 	select SWAP_IO_SPACE
 	help
 	  This enables support for the VR5000-based MIPS Malta evaluation

arch/mips/configs/sead_defconfig

 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc2
-# Sun Nov 21 14:12:06 2004
+# Linux kernel version: 2.6.11-rc2
+# Wed Jan 26 02:49:10 2005
 #
 CONFIG_MIPS=y
 # CONFIG_MIPS64 is not set
@@ -77,13 +77,13 @@ CONFIG_MIPS_SEAD=y
 # CONFIG_SNI_RM200_PCI is not set
 # CONFIG_TOSHIBA_RBTX4927 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_HAVE_DEC_LOCK=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_CPU_LITTLE_ENDIAN=y
 CONFIG_IRQ_CPU=y
 CONFIG_MIPS_BOARDS_GEN=y
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
 
 #
 # CPU selection
@@ -110,7 +110,6 @@ CONFIG_PAGE_SIZE_4KB=y
 # CONFIG_PAGE_SIZE_16KB is not set
 # CONFIG_PAGE_SIZE_64KB is not set
 CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
 # CONFIG_CPU_ADVANCED is not set
 CONFIG_CPU_HAS_LLSC=y
@@ -122,6 +121,19 @@ CONFIG_CPU_HAS_SYNC=y
 #
 CONFIG_MMU=y
 
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PC-card bridges
+#
+
+#
+# PCI Hotplug Support
+#
+
 #
 # Executable file formats
 #
@@ -138,6 +150,7 @@ CONFIG_TRAD_SIGNALS=y
 #
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
 
 #
 # Memory Technology Devices (MTD)
@@ -157,9 +170,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # Block devices
 #
 # CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
 CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=18432
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
@@ -245,6 +260,7 @@ CONFIG_SERIO=y
 # CONFIG_SERIO_I8042 is not set
 CONFIG_SERIO_SERPORT=y
 # CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_LIBPS2 is not set
 CONFIG_SERIO_RAW=y
 
 #
@@ -298,7 +314,6 @@ CONFIG_LEGACY_PTY_COUNT=256
 #
 # Ftape, the floppy tape device driver
 #
-# CONFIG_AGP is not set
 # CONFIG_DRM is not set
 # CONFIG_RAW_DRIVER is not set
 
@@ -328,12 +343,14 @@ CONFIG_LEGACY_PTY_COUNT=256
 #
 # Graphics support
 #
+# CONFIG_FB is not set
 
 #
 # Console display driver support
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
 # Sound
@@ -346,11 +363,25 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_USB_ARCH_HAS_HCD is not set
 # CONFIG_USB_ARCH_HAS_OHCI is not set
 
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+#
+
 #
 # USB Gadget Support
 #
 # CONFIG_USB_GADGET is not set
 
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
 #
 # File systems
 #
@@ -424,6 +455,11 @@ CONFIG_MSDOS_PARTITION=y
 #
 # CONFIG_NLS is not set
 
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
 #
 # Kernel hacking
 #
@@ -443,6 +479,10 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
 #
 # CONFIG_CRYPTO is not set
 
+#
+# Hardware crypto devices
+#
+
 #
 # Library routines
 #

arch/mips/mips-boards/atlas/atlas_int.c

@@ -23,7 +23,6 @@
  * Atlas board.
  *
  */
-#include <linux/config.h>
 #include <linux/compiler.h>
 #include <linux/init.h>
 #include <linux/sched.h>

arch/mips/mips-boards/generic/gdb_hook.c

@@ -18,7 +18,6 @@
  * This is the interface to the remote debugger stub.
  */
 #include <linux/types.h>
-#include <linux/config.h>
 #include <linux/serial.h>
 #include <linux/serialP.h>
 #include <linux/serial_reg.h>

arch/mips/mips-boards/malta/malta_int.c

 /*
  * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000, 2001 MIPS Technologies, Inc.
+ * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
  * Copyright (C) 2001 Ralf Baechle
  *
  *  This program is free software; you can distribute it and/or modify it
@@ -21,7 +21,6 @@
  * The interrupt controller is located in the South Bridge a PIIX4 device
  * with two internal 82C95 interrupt controllers.
  */
-#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/sched.h>
@@ -41,7 +40,7 @@
 
 extern asmlinkage void mipsIRQ(void);
 
-static spinlock_t mips_irq_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(mips_irq_lock);
 
 static inline int mips_pcibios_iack(void)
 {
@@ -155,9 +154,9 @@ void corehi_irqdispatch(struct pt_regs *regs)
         case MIPS_REVISION_CORID_CORE_FPGAR2:
                 data = GT_READ(GT_INTRCAUSE_OFS);
                 printk("GT_INTRCAUSE = %08x\n", data);
-                data = GT_READ(0x70);
-                datahi = GT_READ(0x78);
-                printk("GT_CPU_ERR_ADDR = %02x%08x\n", datahi, data);
+                data = GT_READ(GT_CPUERR_ADDRLO_OFS);
+                datahi = GT_READ(GT_CPUERR_ADDRHI_OFS);
+                printk("GT_CPUERR_ADDR = %02x%08x\n", datahi, data);
                 break;
         case MIPS_REVISION_CORID_BONITO64:
         case MIPS_REVISION_CORID_CORE_20K:

arch/mips/pci/fixup-atlas.c

+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <asm/mips-boards/atlasint.h>

arch/mips/pci/ops-msc.c

 /*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999, 2000 MIPS Technologies, Inc.  All rights reserved.
+ * Copyright (C) 1999, 2000, 2004, 2005  MIPS Technologies, Inc.
+ *    All rights reserved.
+ *    Authors: Carsten Langgaard <carstenl@mips.com>
+ *             Maciej W. Rozycki <macro@mips.com>
+ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
  *
  *  This program is free software; you can distribute it and/or modify it
  *  under the terms of the GNU General Public License (Version 2) as
@@ -18,6 +21,7 @@
  * MIPS boards specific PCI support.
  *
  */
+#include <linux/config.h>
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/kernel.h>

include/asm-mips/mach-atlas/mc146818rtc.h

 /*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
- * Copyright (C) 2003 by Ralf Baechle
+ * Copyright (C) 1999, 2000, 2005  MIPS Technologies, Inc.
+ *	All rights reserved.
+ *	Authors: Carsten Langgaard <carstenl@mips.com>
+ *		 Maciej W. Rozycki <macro@mips.com>
+ * Copyright (C) 2003, 05 Ralf Baechle (ralf@linux-mips.org)
  *
  * This program is free software; you can distribute it and/or modify it
  * under the terms of the GNU General Public License (Version 2) as
@@ -19,33 +21,34 @@
 #ifndef __ASM_MACH_ATLAS_MC146818RTC_H
 #define __ASM_MACH_ATLAS_MC146818RTC_H
 
-#include <asm/io.h>
+#include <linux/types.h>
+
+#include <asm/addrspace.h>
+
 #include <asm/mips-boards/atlas.h>
 #include <asm/mips-boards/atlasint.h>
 
-
-#define RTC_PORT(x)	(ATLAS_RTC_ADR_REG + (x)*8)
-#define RTC_IOMAPPED	1
-#define RTC_EXTENT	16
+#define RTC_PORT(x)	(ATLAS_RTC_ADR_REG + (x) * 8)
+#define RTC_IO_EXTENT	0x100
+#define RTC_IOMAPPED	0
 #define RTC_IRQ		ATLASINT_RTC
 
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
-#define ATLAS_RTC_PORT(x) (RTC_PORT(x) + 0)
-#else
-#define ATLAS_RTC_PORT(x) (RTC_PORT(x) + 3)
-#endif
-
 static inline unsigned char CMOS_READ(unsigned long addr)
 {
-	outb(addr, ATLAS_RTC_PORT(0));
+	volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
+	volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
 
-	return inb(ATLAS_RTC_PORT(1));
+	*ireg = addr;
+	return *dreg;
 }
 
 static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
 {
-	outb(addr, ATLAS_RTC_PORT(0));
-	outb(data, ATLAS_RTC_PORT(1));
+	volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
+	volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
+
+	*ireg = addr;
+	*dreg = data;
 }
 
 #define RTC_ALWAYS_BCD	0

include/asm-mips/mach-mips/cpu-feature-overrides.h

@@ -4,10 +4,13 @@
  * for more details.
  *
  * Copyright (C) 2003, 2004 Chris Dearman
+ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
  */
 #ifndef __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
 
+#include <linux/config.h>
+
 /*
  * CPU feature overrides for MIPS boards
  */

include/asm-mips/mach-mips/mach-gt64120.h

@@ -8,7 +8,7 @@
 #ifndef _ASM_MACH_MIPS_MACH_GT64120_DEP_H
 #define _ASM_MACH_MIPS_MACH_GT64120_DEP_H
 
-#define MIPS_GT_BASE    0x1be00000
+#define MIPS_GT_BASE	0x1be00000
 
 extern unsigned long _pcictrl_gt64120;
 /*
@@ -19,10 +19,10 @@ extern unsigned long _pcictrl_gt64120;
 /*
  *   PCI Bus allocation
  */
-#define GT_PCI_MEM_BASE    0x12000000UL
-#define GT_PCI_MEM_SIZE    0x02000000UL
-#define GT_PCI_IO_BASE     0x10000000UL
-#define GT_PCI_IO_SIZE     0x02000000UL
-#define GT_ISA_IO_BASE     PCI_IO_BASE
+#define GT_PCI_MEM_BASE	0x12000000UL
+#define GT_PCI_MEM_SIZE	0x02000000UL
+#define GT_PCI_IO_BASE	0x10000000UL
+#define GT_PCI_IO_SIZE	0x02000000UL
+#define GT_ISA_IO_BASE	PCI_IO_BASE
 
 #endif /* _ASM_MACH_MIPS_MACH_GT64120_DEP_H */