Commit c96a0f74 authored by Paul Burton's avatar Paul Burton Committed by David S. Miller

net: pch_gbe: Remove {read,write}_phy_reg HAL abstraction

For some reason the pch_gbe driver contains a struct pch_gbe_functions
with pointers used by a HAL abstraction layer, even though there is only
one implementation of each function.

This patch removes the read_phy_reg & write_phy_reg abstractions in
favor of calling pch_gbe_phy_read_reg_miic & pch_gbe_phy_write_reg_miic
directly.
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7dbe38ae
...@@ -332,14 +332,10 @@ struct pch_gbe_hw; ...@@ -332,14 +332,10 @@ struct pch_gbe_hw;
* struct pch_gbe_functions - HAL APi function pointer * struct pch_gbe_functions - HAL APi function pointer
* @get_bus_info: for pch_gbe_hal_get_bus_info * @get_bus_info: for pch_gbe_hal_get_bus_info
* @init_hw: for pch_gbe_hal_init_hw * @init_hw: for pch_gbe_hal_init_hw
* @read_phy_reg: for pch_gbe_hal_read_phy_reg
* @write_phy_reg: for pch_gbe_hal_write_phy_reg
*/ */
struct pch_gbe_functions { struct pch_gbe_functions {
void (*get_bus_info) (struct pch_gbe_hw *); void (*get_bus_info) (struct pch_gbe_hw *);
s32 (*init_hw) (struct pch_gbe_hw *); s32 (*init_hw) (struct pch_gbe_hw *);
s32 (*read_phy_reg) (struct pch_gbe_hw *, u32, u16 *);
s32 (*write_phy_reg) (struct pch_gbe_hw *, u32, u16);
}; };
/** /**
......
...@@ -86,8 +86,6 @@ static s32 pch_gbe_plat_init_hw(struct pch_gbe_hw *hw) ...@@ -86,8 +86,6 @@ static s32 pch_gbe_plat_init_hw(struct pch_gbe_hw *hw)
static const struct pch_gbe_functions pch_gbe_ops = { static const struct pch_gbe_functions pch_gbe_ops = {
.get_bus_info = pch_gbe_plat_get_bus_info, .get_bus_info = pch_gbe_plat_get_bus_info,
.init_hw = pch_gbe_plat_init_hw, .init_hw = pch_gbe_plat_init_hw,
.read_phy_reg = pch_gbe_phy_read_reg_miic,
.write_phy_reg = pch_gbe_phy_write_reg_miic,
}; };
/** /**
...@@ -153,37 +151,3 @@ s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw) ...@@ -153,37 +151,3 @@ s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw)
} }
return hw->func->init_hw(hw); return hw->func->init_hw(hw);
} }
/**
* pch_gbe_hal_read_phy_reg - Reads PHY register
* @hw: Pointer to the HW structure
* @offset: The register to read
* @data: The buffer to store the 16-bit read.
* Returns:
* 0: Successfully
* Negative value: Failed
*/
s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset,
u16 *data)
{
if (!hw->func->read_phy_reg)
return 0;
return hw->func->read_phy_reg(hw, offset, data);
}
/**
* pch_gbe_hal_write_phy_reg - Writes PHY register
* @hw: Pointer to the HW structure
* @offset: The register to read
* @data: The value to write.
* Returns:
* 0: Successfully
* Negative value: Failed
*/
s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset,
u16 data)
{
if (!hw->func->write_phy_reg)
return 0;
return hw->func->write_phy_reg(hw, offset, data);
}
...@@ -24,7 +24,5 @@ ...@@ -24,7 +24,5 @@
s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw); s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw);
void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw); void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw);
s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw); s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw);
s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 *data);
s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 data);
#endif #endif
...@@ -125,7 +125,7 @@ static int pch_gbe_set_link_ksettings(struct net_device *netdev, ...@@ -125,7 +125,7 @@ static int pch_gbe_set_link_ksettings(struct net_device *netdev,
u32 advertising; u32 advertising;
int ret; int ret;
pch_gbe_hal_write_phy_reg(hw, MII_BMCR, BMCR_RESET); pch_gbe_phy_write_reg_miic(hw, MII_BMCR, BMCR_RESET);
memcpy(&copy_ecmd, ecmd, sizeof(*ecmd)); memcpy(&copy_ecmd, ecmd, sizeof(*ecmd));
...@@ -204,7 +204,7 @@ static void pch_gbe_get_regs(struct net_device *netdev, ...@@ -204,7 +204,7 @@ static void pch_gbe_get_regs(struct net_device *netdev,
*regs_buff++ = ioread32(&hw->reg->INT_ST + i); *regs_buff++ = ioread32(&hw->reg->INT_ST + i);
/* PHY register */ /* PHY register */
for (i = 0; i < PCH_GBE_PHY_REGS_LEN; i++) { for (i = 0; i < PCH_GBE_PHY_REGS_LEN; i++) {
pch_gbe_hal_read_phy_reg(&adapter->hw, i, &tmp); pch_gbe_phy_read_reg_miic(&adapter->hw, i, &tmp);
*regs_buff++ = tmp; *regs_buff++ = tmp;
} }
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment