Commit c9e8e8d2 authored by Jiri Prchal's avatar Jiri Prchal Committed by Mark Brown

ASoC: tlv320aic3x: extending registers cache

Adds missing register default values to cache.
Signed-off-by: default avatarJiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 784a897e
...@@ -118,7 +118,9 @@ static const u8 aic3x_reg[AIC3X_CACHEREGNUM] = { ...@@ -118,7 +118,9 @@ static const u8 aic3x_reg[AIC3X_CACHEREGNUM] = {
0x00, 0x00, 0x00, 0x00, /* 88 */ 0x00, 0x00, 0x00, 0x00, /* 88 */
0x00, 0x00, 0x00, 0x00, /* 92 */ 0x00, 0x00, 0x00, 0x00, /* 92 */
0x00, 0x00, 0x00, 0x00, /* 96 */ 0x00, 0x00, 0x00, 0x00, /* 96 */
0x00, 0x00, 0x02, /* 100 */ 0x00, 0x00, 0x02, 0x00, /* 100 */
0x00, 0x00, 0x00, 0x00, /* 104 */
0x00, 0x00, /* 108 */
}; };
#define SOC_DAPM_SINGLE_AIC3X(xname, reg, shift, mask, invert) \ #define SOC_DAPM_SINGLE_AIC3X(xname, reg, shift, mask, invert) \
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment