Skip to content

L
linux
Commit ca6bc7a1 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files
Options

Merge tag 'samsung-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt 

Samsung DTS ARM changes for v5.8

1. Add DTS for Exynos4210-based Samsung Galaxy S2 (GT-I9100)
   mobile phone,
2. Enable WiFi and Bluetooth in multiple boards,
3. Add new features to S5Pv210-based Aries family of mobile phones
   (e.g. Samsung Galaxy S): necessary configuration for suspend, audio
   support, USB mux, touch keys, panel, i2c-gpio adapters, FM radio, ADC,
4. Many minor fixes (e.g. GPIO polarity, interrupts).

* tag 'samsung-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (29 commits)
  ARM: dts: s5pv210: Set MAX8998 GPIO pulls on Aries boards
  ARM: dts: s5pv210: Correct FIMC definitions
  ARM: dts: s5pv210: Assign clocks to MMC devices on Aries boards
  ARM: dts: s5pv210: Enable ADC on Aries boards
  ARM: dts: s5pv210: Add an ADC node
  ARM: dts: s5pv210: Disable pull for vibrator enable GPIO on Aries boards
  ARM: dts: s5pv210: Add si470x FM radio to Galaxy S
  ARM: dts: s5pv210: Add remaining i2c-gpio adapters to Aries boards
  ARM: dts: s5pv210: Add panel support to Aries boards
  ARM: dts: s5pv210: Add touchkey support to Aries boards
  ARM: dts: s5pv210: Add FSA9480 support to Aries boards
  ARM: dts: s5pv210: Add WM8994 support to Aries boards
  ARM: dts: s5pv210: Disable pulls on GPIO I2C adapters for Aries
  ARM: dts: s5pv210: Set keep-power-in-suspend for SDHCI1 on Aries
  ARM: dts: s5pv210: Correct gpi pinctrl node name
  ARM: dts: s5pv210: Add sleep GPIO configuration for Galaxy S
  ARM: dts: s5pv210: Add sleep GPIO configuration for Fascinate4G
  ARM: dts: s5pv210: Add helper define for sleep gpio config
  ARM: dts: exynos: Enable WLAN support for the UniversalC210 board
  ARM: dts: exynos: Enable WLAN support for the Rinato board
  ...

Link: https://lore.kernel.org/r/20200512122922.5700-2-krzk@kernel.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c380981e c9ed436f
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 1820 additions and 74 deletions
Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
View file @ ca6bc7a1
......@@ -52,6 +52,7 @@ properties:
items:
- enum:
- insignal,origen # Insignal Origen
- samsung,i9100 # Samsung Galaxy S2 (GT-I9100)
- samsung,smdkv310 # Samsung SMDKV310 eval
- samsung,trats # Samsung Tizen Reference
- samsung,universal_c210 # Samsung C210
......
arch/arm/boot/dts/Makefile
View file @ ca6bc7a1
......@@ -181,6 +181,7 @@ dtb-$(CONFIG_ARCH_EXYNOS3) += \
exynos3250-monk.dtb \
exynos3250-rinato.dtb
dtb-$(CONFIG_ARCH_EXYNOS4) += \
exynos4210-i9100.dtb \
exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
......
arch/arm/boot/dts/exynos3250-monk.dts
View file @ ca6bc7a1
......@@ -57,7 +57,8 @@ vemmc_reg: voltage-regulator-0 {
i2c_max77836: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpd0 2 GPIO_ACTIVE_HIGH>, <&gpd0 3 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpd0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpd0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
#address-cells = <1>;
#size-cells = <0>;
......
arch/arm/boot/dts/exynos3250-rinato.dts
View file @ ca6bc7a1
......@@ -50,9 +50,15 @@ power_key {
};
};
wlan_pwrseq: mshc1-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>;
};
i2c_max77836: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpd0 2 GPIO_ACTIVE_HIGH>, <&gpd0 3 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpd0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpd0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -605,8 +611,6 @@ &jpeg {
};
&mshc_0 {
#address-cells = <1>;
#size-cells = <0>;
broken-cd;
non-removable;
cap-mmc-highspeed;
......@@ -625,10 +629,48 @@ &mshc_0 {
status = "okay";
};
&mshc_1 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
non-removable;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
samsung,dw-mshc-ciu-div = <1>;
samsung,dw-mshc-sdr-timing = <0 1>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus1 &sd1_bus4>;
bus-width = <4>;
mmc-pwrseq = <&wlan_pwrseq>;
brcmf: wifi@1 {
compatible = "brcm,bcm4334-fmac";
reg = <1>;
interrupt-parent = <&gpx1>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
};
};
&serial_0 {
assigned-clocks = <&cmu CLK_SCLK_UART0>;
assigned-clock-rates = <100000000>;
status = "okay";
bluetooth {
compatible = "brcm,bcm4330-bt";
max-speed = <3000000>;
shutdown-gpios = <&gpe0 0 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
clocks = <&s2mps14_osc S2MPS11_CLK_BT>;
};
};
&serial_1 {
......
arch/arm/boot/dts/exynos4210-i9100.dts 0 → 100644
View file @ ca6bc7a1
This diff is collapsed.
arch/arm/boot/dts/exynos4210-origen.dts
View file @ ca6bc7a1
......@@ -251,12 +251,7 @@ ldo21_reg: LDO21 {
};
buck1_reg: BUCK1 {
/*
* HACK: The real name is VDD_ARM_1.2V,
* but exynos-cpufreq does not support
* DT-based regulator lookup yet.
*/
regulator-name = "vdd_arm";
regulator-name = "VDD_ARM_1.2V";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
......
arch/arm/boot/dts/exynos4210-trats.dts
View file @ ca6bc7a1
......@@ -121,6 +121,11 @@ ok-key {
};
};
wlan_pwrseq: sdhci3-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpl1 2 GPIO_ACTIVE_LOW>;
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
......@@ -280,11 +285,10 @@ &i2c_5 {
max8997_pmic@66 {
compatible = "maxim,max8997-pmic";
interrupts-extended = <&gpx0 7 0>, <&gpx2 3 0>;
reg = <0x66>;
interrupt-parent = <&gpx0>;
interrupts = <7 IRQ_TYPE_NONE>;
interrupts-extended = <&gpx0 7 IRQ_TYPE_LEVEL_LOW>,
<&gpx2 3 IRQ_TYPE_EDGE_FALLING>;
max8997,pmic-buck1-uses-gpio-dvs;
max8997,pmic-buck2-uses-gpio-dvs;
......@@ -403,12 +407,7 @@ vddq_reg: LDO21 {
};
varm_breg: BUCK1 {
/*
* HACK: The real name is VARM_1.2V_C210,
* but exynos-cpufreq does not support
* DT-based regulator lookup yet.
*/
regulator-name = "vdd_arm";
regulator-name = "VARM_1.2V_C210";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
......@@ -471,6 +470,30 @@ &sdhci_2 {
status = "okay";
};
&sdhci_3 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
non-removable;
bus-width = <4>;
mmc-pwrseq = <&wlan_pwrseq>;
vmmc-supply = <&tflash_reg>;
pinctrl-names = "default";
pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>;
brcmf: wifi@1 {
compatible = "brcm,bcm4330-fmac";
reg = <1>;
interrupt-parent = <&gpx2>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
};
};
&serial_0 {
status = "okay";
};
......
arch/arm/boot/dts/exynos4210-universal_c210.dts
View file @ ca6bc7a1
......@@ -50,6 +50,11 @@ vemmc_reg: voltage-regulator {
enable-active-high;
};
wlan_pwrseq: sdhci3-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpe3 1 GPIO_ACTIVE_LOW>;
};
gpio-keys {
compatible = "gpio-keys";
......@@ -164,7 +169,8 @@ hdmi_en: voltage-regulator-hdmi-5v {
hdmi_ddc: i2c-ddc {
compatible = "i2c-gpio";
gpios = <&gpe4 2 GPIO_ACTIVE_HIGH &gpe4 3 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpe4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpe4 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <100>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -317,7 +323,7 @@ vdd_arm_reg: pmic@60 {
max8952,sync-freq = <0>;
max8952,ramp-speed = <0>;
regulator-name = "vdd_arm";
regulator-name = "VARM_1.2V_C210";
regulator-min-microvolt = <770000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
......@@ -563,6 +569,29 @@ &sdhci_2 {
status = "okay";
};
&sdhci_3 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
non-removable;
bus-width = <4>;
mmc-pwrseq = <&wlan_pwrseq>;
vmmc-supply = <&ldo5_reg>;
pinctrl-names = "default";
pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>;
brcmf: wifi@1 {
compatible = "brcm,bcm4330-fmac";
reg = <1>;
interrupt-parent = <&gpx2>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
};
};
&serial_0 {
status = "okay";
/delete-property/dmas;
......
arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi
View file @ ca6bc7a1
......@@ -53,7 +53,8 @@ ps_als_reg: voltage-regulator-8 {
i2c_ak8975: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpy2 4 GPIO_ACTIVE_HIGH>, <&gpy2 5 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpy2 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -68,7 +69,8 @@ ak8975@c {
i2c_cm36651: i2c-gpio-2 {
compatible = "i2c-gpio";
gpios = <&gpf0 0 GPIO_ACTIVE_LOW>, <&gpf0 1 GPIO_ACTIVE_LOW>;
sda-gpios = <&gpf0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpf0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
......
arch/arm/boot/dts/exynos4412-midas.dtsi
View file @ ca6bc7a1
......@@ -140,7 +140,8 @@ key-ok {
i2c_max77693: i2c-gpio-1 {
compatible = "i2c-gpio";
gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -188,7 +189,8 @@ charger {
i2c_max77693_fuel: i2c-gpio-3 {
compatible = "i2c-gpio";
gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpf1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpf1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -228,7 +230,8 @@ touchkey@20 {
i2c-mhl {
compatible = "i2c-gpio";
gpios = <&gpf0 4 GPIO_ACTIVE_HIGH>, <&gpf0 6 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpf0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpf0 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <100>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -820,7 +823,7 @@ ldo26_reg: LDO26 {
};
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-name = "VDD_MIF";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
......@@ -831,7 +834,7 @@ regulator-state-mem {
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-name = "VDD_ARM";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
......@@ -842,7 +845,7 @@ regulator-state-mem {
};
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
regulator-name = "VDD_INT";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
......@@ -853,7 +856,7 @@ regulator-state-mem {
};
buck4_reg: BUCK4 {
regulator-name = "vdd_g3d";
regulator-name = "VDD_G3D";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
......
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View file @ ca6bc7a1
......@@ -430,7 +430,7 @@ ldo25_reg: LDO25 {
};
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-name = "VDD_MIF";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
......@@ -438,7 +438,7 @@ buck1_reg: BUCK1 {
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-name = "VDD_ARM";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
......@@ -446,7 +446,7 @@ buck2_reg: BUCK2 {
};
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
regulator-name = "VDD_INT";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1050000>;
regulator-always-on;
......@@ -454,7 +454,7 @@ buck3_reg: BUCK3 {
};
buck4_reg: BUCK4 {
regulator-name = "vdd_g3d";
regulator-name = "VDD_G3D";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
regulator-microvolt-offset = <50000>;
......
arch/arm/boot/dts/exynos4412-origen.dts
View file @ ca6bc7a1
......@@ -363,7 +363,7 @@ ldo28_reg: LDO28 {
};
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-name = "VDD_MIF";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
......@@ -372,7 +372,7 @@ buck1_reg: BUCK1 {
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-name = "VDD_ARM";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
......@@ -381,7 +381,7 @@ buck2_reg: BUCK2 {
};
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
regulator-name = "VDD_INT";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
......@@ -390,7 +390,7 @@ buck3_reg: BUCK3 {
};
buck4_reg: BUCK4 {
regulator-name = "vdd_g3d";
regulator-name = "VDD_G3D";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
......@@ -399,7 +399,7 @@ buck4_reg: BUCK4 {
};
buck5_reg: BUCK5 {
regulator-name = "vdd_m12";
regulator-name = "VDD_M12";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
......@@ -408,7 +408,7 @@ buck5_reg: BUCK5 {
};
buck6_reg: BUCK6 {
regulator-name = "vdd12_5m";
regulator-name = "VDD12_5M";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
......@@ -417,7 +417,7 @@ buck6_reg: BUCK6 {
};
buck9_reg: BUCK9 {
regulator-name = "vddf28_emmc";
regulator-name = "VDDF28_EMMC";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
......
arch/arm/boot/dts/exynos5250-arndale.dts
View file @ ca6bc7a1
......@@ -454,7 +454,7 @@ ldo26_reg: LDO26 {
};
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-name = "VDD_MIF";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
......@@ -463,7 +463,7 @@ buck1_reg: BUCK1 {
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-name = "VDD_ARM";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
......@@ -472,7 +472,7 @@ buck2_reg: BUCK2 {
};
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
regulator-name = "VDD_INT";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
......@@ -481,7 +481,7 @@ buck3_reg: BUCK3 {
};
buck4_reg: BUCK4 {
regulator-name = "vdd_g3d";
regulator-name = "VDD_G3D";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
......@@ -641,9 +641,8 @@ i2c_ddc: i2c-gpio {
pinctrl-0 = <&i2c2_gpio_bus>;
status = "okay";
compatible = "i2c-gpio";
gpios = <&gpa0 6 0 /* sda */
&gpa0 7 0 /* scl */
>;
sda-gpios = <&gpa0 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpa0 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
......
arch/arm/boot/dts/exynos5420-arndale-octa.dts
View file @ ca6bc7a1
......@@ -673,7 +673,7 @@ regulator-state-mem {
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-name = "PVDD_ARM_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
......
arch/arm/boot/dts/s5pv210-aries.dtsi
View file @ ca6bc7a1
This diff is collapsed.
arch/arm/boot/dts/s5pv210-fascinate4g.dts
View file @ ca6bc7a1
......@@ -36,3 +36,252 @@ vol-up {
};
};
};
&pinctrl0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep_cfg>;
/* Based on vendor kernel v2.6.35.7 */
sleep_cfg: sleep-cfg {
PIN_SLP(gpa0-0, PREV, NONE);
PIN_SLP(gpa0-1, PREV, NONE);
PIN_SLP(gpa0-2, PREV, NONE);
PIN_SLP(gpa0-3, OUT1, NONE);
PIN_SLP(gpa0-4, PREV, NONE);
PIN_SLP(gpa0-5, PREV, NONE);
PIN_SLP(gpa0-6, PREV, NONE);
PIN_SLP(gpa0-7, PREV, NONE);
PIN_SLP(gpa1-0, INPUT, DOWN);
PIN_SLP(gpa1-1, OUT0, NONE);
PIN_SLP(gpa1-2, INPUT, DOWN);
PIN_SLP(gpa1-3, OUT0, NONE);
PIN_SLP(gpb-0, OUT0, NONE);
PIN_SLP(gpb-1, OUT1, NONE);
PIN_SLP(gpb-2, OUT0, NONE);
PIN_SLP(gpb-3, PREV, NONE);
PIN_SLP(gpb-4, INPUT, NONE);
PIN_SLP(gpb-5, PREV, NONE);
PIN_SLP(gpb-6, INPUT, DOWN);
PIN_SLP(gpb-7, OUT0, NONE);
PIN_SLP(gpc0-0, OUT0, NONE);
PIN_SLP(gpc0-1, INPUT, DOWN);
PIN_SLP(gpc0-2, OUT0, NONE);
PIN_SLP(gpc0-3, INPUT, DOWN);
PIN_SLP(gpc0-4, OUT0, NONE);
PIN_SLP(gpc1-0, INPUT, DOWN);
PIN_SLP(gpc1-1, INPUT, DOWN);
PIN_SLP(gpc1-2, INPUT, DOWN);
PIN_SLP(gpc1-3, INPUT, DOWN);
PIN_SLP(gpc1-4, INPUT, DOWN);
PIN_SLP(gpd0-0, INPUT, DOWN);
PIN_SLP(gpd0-1, OUT0, NONE);
PIN_SLP(gpd0-2, INPUT, DOWN);
PIN_SLP(gpd0-3, INPUT, DOWN);
PIN_SLP(gpd1-0, INPUT, NONE);
PIN_SLP(gpd1-1, INPUT, NONE);
PIN_SLP(gpd1-2, INPUT, DOWN);
PIN_SLP(gpd1-3, INPUT, DOWN);
PIN_SLP(gpd1-4, INPUT, DOWN);
PIN_SLP(gpd1-5, INPUT, DOWN);
PIN_SLP(gpe0-0, INPUT, DOWN);
PIN_SLP(gpe0-1, INPUT, DOWN);
PIN_SLP(gpe0-2, INPUT, DOWN);
PIN_SLP(gpe0-3, INPUT, DOWN);
PIN_SLP(gpe0-4, INPUT, DOWN);
PIN_SLP(gpe0-5, INPUT, DOWN);
PIN_SLP(gpe0-6, INPUT, DOWN);
PIN_SLP(gpe0-7, INPUT, DOWN);
PIN_SLP(gpe1-0, INPUT, DOWN);
PIN_SLP(gpe1-1, INPUT, DOWN);
PIN_SLP(gpe1-2, INPUT, DOWN);
PIN_SLP(gpe1-3, OUT0, NONE);
PIN_SLP(gpe1-4, INPUT, DOWN);
PIN_SLP(gpf0-0, OUT0, NONE);
PIN_SLP(gpf0-1, OUT0, NONE);
PIN_SLP(gpf0-2, OUT0, NONE);
PIN_SLP(gpf0-3, OUT0, NONE);
PIN_SLP(gpf0-4, OUT0, NONE);
PIN_SLP(gpf0-5, OUT0, NONE);
PIN_SLP(gpf0-6, OUT0, NONE);
PIN_SLP(gpf0-7, OUT0, NONE);
PIN_SLP(gpf1-0, OUT0, NONE);
PIN_SLP(gpf1-1, OUT0, NONE);
PIN_SLP(gpf1-2, OUT0, NONE);
PIN_SLP(gpf1-3, OUT0, NONE);
PIN_SLP(gpf1-4, OUT0, NONE);
PIN_SLP(gpf1-5, OUT0, NONE);
PIN_SLP(gpf1-6, OUT0, NONE);
PIN_SLP(gpf1-7, OUT0, NONE);
PIN_SLP(gpf2-0, OUT0, NONE);
PIN_SLP(gpf2-1, OUT0, NONE);
PIN_SLP(gpf2-2, OUT0, NONE);
PIN_SLP(gpf2-3, OUT0, NONE);
PIN_SLP(gpf2-4, OUT0, NONE);
PIN_SLP(gpf2-5, OUT0, NONE);
PIN_SLP(gpf2-6, OUT0, NONE);
PIN_SLP(gpf2-7, OUT0, NONE);
PIN_SLP(gpf3-0, OUT0, NONE);
PIN_SLP(gpf3-1, OUT0, NONE);
PIN_SLP(gpf3-2, OUT0, NONE);
PIN_SLP(gpf3-3, OUT0, NONE);
PIN_SLP(gpf3-4, PREV, NONE);
PIN_SLP(gpf3-5, INPUT, DOWN);
PIN_SLP(gpg0-0, INPUT, DOWN);
PIN_SLP(gpg0-1, INPUT, DOWN);
PIN_SLP(gpg0-2, INPUT, NONE);
PIN_SLP(gpg0-3, INPUT, DOWN);
PIN_SLP(gpg0-4, INPUT, DOWN);
PIN_SLP(gpg0-5, INPUT, DOWN);
PIN_SLP(gpg0-6, INPUT, DOWN);
PIN_SLP(gpg1-0, OUT0, NONE);
PIN_SLP(gpg1-1, OUT1, NONE);
PIN_SLP(gpg1-2, PREV, NONE);
PIN_SLP(gpg1-3, OUT1, NONE);
PIN_SLP(gpg1-4, OUT1, NONE);
PIN_SLP(gpg1-5, OUT1, NONE);
PIN_SLP(gpg1-6, OUT1, NONE);
PIN_SLP(gpg2-0, OUT0, NONE);
PIN_SLP(gpg2-1, OUT0, NONE);
PIN_SLP(gpg2-2, INPUT, NONE);
PIN_SLP(gpg2-3, OUT0, NONE);
PIN_SLP(gpg2-4, OUT0, NONE);
PIN_SLP(gpg2-5, OUT0, NONE);
PIN_SLP(gpg2-6, OUT0, NONE);
PIN_SLP(gpg3-0, PREV, UP);
PIN_SLP(gpg3-1, PREV, UP);
PIN_SLP(gpg3-2, INPUT, NONE);
PIN_SLP(gpg3-3, INPUT, DOWN);
PIN_SLP(gpg3-4, OUT0, NONE);
PIN_SLP(gpg3-5, OUT0, NONE);
PIN_SLP(gpg3-6, INPUT, DOWN);
PIN_SLP(gpi-0, PREV, NONE);
PIN_SLP(gpi-1, INPUT, DOWN);
PIN_SLP(gpi-2, PREV, NONE);
PIN_SLP(gpi-3, PREV, NONE);
PIN_SLP(gpi-4, PREV, NONE);
PIN_SLP(gpi-5, INPUT, DOWN);
PIN_SLP(gpi-6, INPUT, DOWN);
PIN_SLP(gpj0-0, INPUT, NONE);
PIN_SLP(gpj0-1, INPUT, NONE);
PIN_SLP(gpj0-2, INPUT, NONE);
PIN_SLP(gpj0-3, INPUT, NONE);
PIN_SLP(gpj0-4, INPUT, NONE);
PIN_SLP(gpj0-5, INPUT, DOWN);
PIN_SLP(gpj0-6, OUT0, NONE);
PIN_SLP(gpj0-7, INPUT, NONE);
PIN_SLP(gpj1-0, OUT1, NONE);
PIN_SLP(gpj1-1, OUT0, NONE);
PIN_SLP(gpj1-2, INPUT, DOWN);
PIN_SLP(gpj1-3, PREV, NONE);
PIN_SLP(gpj1-4, PREV, NONE);
PIN_SLP(gpj1-5, OUT0, NONE);
PIN_SLP(gpj2-0, INPUT, DOWN);
PIN_SLP(gpj2-1, INPUT, DOWN);
PIN_SLP(gpj2-2, OUT0, NONE);
PIN_SLP(gpj2-3, INPUT, DOWN);
PIN_SLP(gpj2-4, INPUT, DOWN);
PIN_SLP(gpj2-5, PREV, NONE);
PIN_SLP(gpj2-6, PREV, NONE);
PIN_SLP(gpj2-7, INPUT, DOWN);
PIN_SLP(gpj3-0, INPUT, NONE);
PIN_SLP(gpj3-1, INPUT, NONE);
PIN_SLP(gpj3-2, OUT0, NONE);
PIN_SLP(gpj3-3, INPUT, DOWN);
PIN_SLP(gpj3-4, INPUT, NONE);
PIN_SLP(gpj3-5, INPUT, NONE);
PIN_SLP(gpj3-6, INPUT, NONE);
PIN_SLP(gpj3-7, INPUT, NONE);
PIN_SLP(gpj4-0, INPUT, NONE);
PIN_SLP(gpj4-1, INPUT, DOWN);
PIN_SLP(gpj4-2, PREV, NONE);
PIN_SLP(gpj4-3, INPUT, NONE);
PIN_SLP(gpj4-4, INPUT, DOWN);
PIN_SLP(mp01-0, OUT1, NONE);
PIN_SLP(mp01-1, OUT0, NONE);
PIN_SLP(mp01-2, INPUT, DOWN);
PIN_SLP(mp01-3, INPUT, DOWN);
PIN_SLP(mp01-4, OUT1, NONE);
PIN_SLP(mp01-5, INPUT, DOWN);
PIN_SLP(mp01-6, INPUT, DOWN);
PIN_SLP(mp01-7, INPUT, DOWN);
PIN_SLP(mp02-0, INPUT, DOWN);
PIN_SLP(mp02-1, INPUT, DOWN);
PIN_SLP(mp02-2, INPUT, NONE);
PIN_SLP(mp02-3, INPUT, DOWN);
PIN_SLP(mp03-0, INPUT, DOWN);
PIN_SLP(mp03-1, INPUT, DOWN);
PIN_SLP(mp03-2, OUT1, NONE);
PIN_SLP(mp03-3, OUT0, NONE);
PIN_SLP(mp03-4, INPUT, NONE);
PIN_SLP(mp03-5, OUT0, NONE);
PIN_SLP(mp03-6, INPUT, DOWN);
PIN_SLP(mp03-7, INPUT, DOWN);
PIN_SLP(mp04-0, INPUT, DOWN);
PIN_SLP(mp04-1, OUT0, NONE);
PIN_SLP(mp04-2, INPUT, DOWN);
PIN_SLP(mp04-3, OUT0, NONE);
PIN_SLP(mp04-4, INPUT, DOWN);
PIN_SLP(mp04-5, INPUT, DOWN);
PIN_SLP(mp04-6, OUT0, NONE);
PIN_SLP(mp04-7, INPUT, DOWN);
PIN_SLP(mp05-0, INPUT, NONE);
PIN_SLP(mp05-1, INPUT, NONE);
PIN_SLP(mp05-2, INPUT, NONE);
PIN_SLP(mp05-3, INPUT, NONE);
PIN_SLP(mp05-4, INPUT, DOWN);
PIN_SLP(mp05-5, OUT0, NONE);
PIN_SLP(mp05-6, INPUT, DOWN);
PIN_SLP(mp05-7, PREV, NONE);
PIN_SLP(mp06-0, INPUT, DOWN);
PIN_SLP(mp06-1, INPUT, DOWN);
PIN_SLP(mp06-2, INPUT, DOWN);
PIN_SLP(mp06-3, INPUT, DOWN);
PIN_SLP(mp06-4, INPUT, DOWN);
PIN_SLP(mp06-5, INPUT, DOWN);
PIN_SLP(mp06-6, INPUT, DOWN);
PIN_SLP(mp06-7, INPUT, DOWN);
PIN_SLP(mp07-0, INPUT, DOWN);
PIN_SLP(mp07-1, INPUT, DOWN);
PIN_SLP(mp07-2, INPUT, DOWN);
PIN_SLP(mp07-3, INPUT, DOWN);
PIN_SLP(mp07-4, INPUT, DOWN);
PIN_SLP(mp07-5, INPUT, DOWN);
PIN_SLP(mp07-6, INPUT, DOWN);
PIN_SLP(mp07-7, INPUT, DOWN);
};
};
&wm8994 {
/* GPIO3 (BCLK2) and GPIO4 (LRCLK2) as outputs */
wlf,gpio-cfg = <0xa101 0x8100 0x8100 0x8100 0x8100 0xa101
0x0100 0x8100 0x0100 0x0100 0x0100>;
};
arch/arm/boot/dts/s5pv210-galaxys.dts
View file @ ca6bc7a1
......@@ -49,15 +49,303 @@ home {
wakeup-source;
};
};
i2c_fmradio: i2c-gpio-8 {
compatible = "i2c-gpio";
sda-gpios = <&gpd1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpd1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&fm_i2c_pins>;
fmradio@10 {
compatible = "silabs,si470x";
reg = <0x10>;
interrupt-parent = <&gpj2>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpj2 5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&fm_irq &fm_rst>;
};
};
};
&aliases {
i2c8 = &i2c_fmradio;
};
&pinctrl0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep_cfg>;
fm_i2c_pins: fm-i2c-pins {
samsung,pins = "gpd1-2", "gpd1-3";
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
fm_irq: fm-irq {
samsung,pins = "gpj2-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
fm_rst: fm-rst {
samsung,pins = "gpj2-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
massmemory_en: massmemory-en {
samsung,pins = "gpj2-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
/* Based on CyanogenMod 3.0.101 kernel */
sleep_cfg: sleep-cfg {
PIN_SLP(gpa0-0, PREV, NONE);
PIN_SLP(gpa0-1, PREV, NONE);
PIN_SLP(gpa0-2, PREV, NONE);
PIN_SLP(gpa0-3, OUT1, NONE);
PIN_SLP(gpa0-4, INPUT, DOWN);
PIN_SLP(gpa0-5, OUT0, NONE);
PIN_SLP(gpa0-6, INPUT, DOWN);
PIN_SLP(gpa0-7, OUT1, NONE);
PIN_SLP(gpa1-0, INPUT, DOWN);
PIN_SLP(gpa1-1, OUT0, NONE);
PIN_SLP(gpa1-2, INPUT, NONE);
PIN_SLP(gpa1-3, OUT0, NONE);
PIN_SLP(gpb-0, OUT0, NONE);
PIN_SLP(gpb-1, OUT1, NONE);
PIN_SLP(gpb-2, OUT0, NONE);
PIN_SLP(gpb-3, PREV, NONE);
PIN_SLP(gpb-4, INPUT, NONE);
PIN_SLP(gpb-5, PREV, NONE);
PIN_SLP(gpb-6, INPUT, DOWN);
PIN_SLP(gpb-7, OUT0, NONE);
PIN_SLP(gpc0-0, OUT0, NONE);
PIN_SLP(gpc0-1, INPUT, DOWN);
PIN_SLP(gpc0-2, OUT0, NONE);
PIN_SLP(gpc0-3, INPUT, NONE);
PIN_SLP(gpc0-4, OUT0, NONE);
PIN_SLP(gpc1-0, INPUT, DOWN);
PIN_SLP(gpc1-1, INPUT, DOWN);
PIN_SLP(gpc1-2, INPUT, DOWN);
PIN_SLP(gpc1-3, INPUT, DOWN);
PIN_SLP(gpc1-4, INPUT, DOWN);
PIN_SLP(gpd0-0, INPUT, DOWN);
PIN_SLP(gpd0-1, OUT0, NONE);
PIN_SLP(gpd0-2, INPUT, DOWN);
PIN_SLP(gpd0-3, INPUT, DOWN);
PIN_SLP(gpd1-0, INPUT, NONE);
PIN_SLP(gpd1-1, INPUT, NONE);
PIN_SLP(gpd1-2, INPUT, NONE);
PIN_SLP(gpd1-3, INPUT, NONE);
PIN_SLP(gpd1-4, INPUT, DOWN);
PIN_SLP(gpd1-5, INPUT, DOWN);
PIN_SLP(gpe0-0, INPUT, DOWN);
PIN_SLP(gpe0-1, INPUT, DOWN);
PIN_SLP(gpe0-2, INPUT, DOWN);
PIN_SLP(gpe0-3, INPUT, DOWN);
PIN_SLP(gpe0-4, INPUT, DOWN);
PIN_SLP(gpe0-5, INPUT, DOWN);
PIN_SLP(gpe0-6, INPUT, DOWN);
PIN_SLP(gpe0-7, INPUT, DOWN);
PIN_SLP(gpe1-0, INPUT, DOWN);
PIN_SLP(gpe1-1, INPUT, DOWN);
PIN_SLP(gpe1-2, INPUT, DOWN);
PIN_SLP(gpe1-3, OUT0, NONE);
PIN_SLP(gpe1-4, INPUT, DOWN);
PIN_SLP(gpf0-0, OUT0, NONE);
PIN_SLP(gpf0-1, OUT0, NONE);
PIN_SLP(gpf0-2, OUT0, NONE);
PIN_SLP(gpf0-3, OUT0, NONE);
PIN_SLP(gpf0-4, OUT0, NONE);
PIN_SLP(gpf0-5, OUT0, NONE);
PIN_SLP(gpf0-6, OUT0, NONE);
PIN_SLP(gpf0-7, OUT0, NONE);
PIN_SLP(gpf1-0, OUT0, NONE);
PIN_SLP(gpf1-1, OUT0, NONE);
PIN_SLP(gpf1-2, OUT0, NONE);
PIN_SLP(gpf1-3, OUT0, NONE);
PIN_SLP(gpf1-4, OUT0, NONE);
PIN_SLP(gpf1-5, OUT0, NONE);
PIN_SLP(gpf1-6, OUT0, NONE);
PIN_SLP(gpf1-7, OUT0, NONE);
PIN_SLP(gpf2-0, OUT0, NONE);
PIN_SLP(gpf2-1, OUT0, NONE);
PIN_SLP(gpf2-2, OUT0, NONE);
PIN_SLP(gpf2-3, OUT0, NONE);
PIN_SLP(gpf2-4, OUT0, NONE);
PIN_SLP(gpf2-5, OUT0, NONE);
PIN_SLP(gpf2-6, OUT0, NONE);
PIN_SLP(gpf2-7, OUT0, NONE);
PIN_SLP(gpf3-0, OUT0, NONE);
PIN_SLP(gpf3-1, OUT0, NONE);
PIN_SLP(gpf3-2, OUT0, NONE);
PIN_SLP(gpf3-3, OUT0, NONE);
PIN_SLP(gpf3-4, PREV, NONE);
PIN_SLP(gpf3-5, INPUT, DOWN);
PIN_SLP(gpg0-0, OUT0, NONE);
PIN_SLP(gpg0-1, INPUT, NONE);
PIN_SLP(gpg0-2, INPUT, NONE);
PIN_SLP(gpg0-3, INPUT, NONE);
PIN_SLP(gpg0-4, INPUT, NONE);
PIN_SLP(gpg0-5, INPUT, NONE);
PIN_SLP(gpg0-6, INPUT, NONE);
PIN_SLP(gpg1-0, OUT0, NONE);
PIN_SLP(gpg1-1, OUT1, NONE);
PIN_SLP(gpg1-2, PREV, NONE);
PIN_SLP(gpg1-3, OUT1, NONE);
PIN_SLP(gpg1-4, OUT1, NONE);
PIN_SLP(gpg1-5, OUT1, NONE);
PIN_SLP(gpg1-6, OUT1, NONE);
PIN_SLP(gpg2-0, OUT0, NONE);
PIN_SLP(gpg2-1, OUT0, NONE);
PIN_SLP(gpg2-2, INPUT, NONE);
PIN_SLP(gpg2-3, OUT0, NONE);
PIN_SLP(gpg2-4, OUT0, NONE);
PIN_SLP(gpg2-5, OUT0, NONE);
PIN_SLP(gpg2-6, OUT0, NONE);
PIN_SLP(gpg3-0, OUT1, NONE);
PIN_SLP(gpg3-1, OUT0, NONE);
PIN_SLP(gpg3-2, INPUT, NONE);
PIN_SLP(gpg3-3, INPUT, DOWN);
PIN_SLP(gpg3-4, OUT0, NONE);
PIN_SLP(gpg3-5, OUT0, NONE);
PIN_SLP(gpg3-6, INPUT, DOWN);
PIN_SLP(gpi-0, PREV, NONE);
PIN_SLP(gpi-1, INPUT, DOWN);
PIN_SLP(gpi-2, PREV, NONE);
PIN_SLP(gpi-3, PREV, NONE);
PIN_SLP(gpi-4, PREV, NONE);
PIN_SLP(gpi-5, INPUT, DOWN);
PIN_SLP(gpi-6, INPUT, DOWN);
PIN_SLP(gpj0-0, INPUT, NONE);
PIN_SLP(gpj0-1, INPUT, NONE);
PIN_SLP(gpj0-2, INPUT, NONE);
PIN_SLP(gpj0-3, INPUT, NONE);
PIN_SLP(gpj0-4, INPUT, NONE);
PIN_SLP(gpj0-5, INPUT, DOWN);
PIN_SLP(gpj0-6, OUT0, NONE);
PIN_SLP(gpj0-7, INPUT, NONE);
PIN_SLP(gpj1-0, INPUT, DOWN);
PIN_SLP(gpj1-1, OUT0, NONE);
PIN_SLP(gpj1-2, INPUT, DOWN);
PIN_SLP(gpj1-3, PREV, NONE);
PIN_SLP(gpj1-4, PREV, NONE);
PIN_SLP(gpj1-5, OUT0, NONE);
PIN_SLP(gpj2-0, INPUT, DOWN);
PIN_SLP(gpj2-1, INPUT, DOWN);
PIN_SLP(gpj2-2, OUT0, NONE);
PIN_SLP(gpj2-3, INPUT, DOWN);
PIN_SLP(gpj2-4, INPUT, UP);
PIN_SLP(gpj2-5, PREV, NONE);
PIN_SLP(gpj2-6, PREV, NONE);
PIN_SLP(gpj2-7, OUT1, NONE);
PIN_SLP(gpj3-0, INPUT, NONE);
PIN_SLP(gpj3-1, INPUT, NONE);
PIN_SLP(gpj3-2, OUT0, NONE);
PIN_SLP(gpj3-3, INPUT, DOWN);
PIN_SLP(gpj3-4, INPUT, NONE);
PIN_SLP(gpj3-5, INPUT, NONE);
PIN_SLP(gpj3-6, INPUT, NONE);
PIN_SLP(gpj3-7, INPUT, NONE);
PIN_SLP(gpj4-0, INPUT, NONE);
PIN_SLP(gpj4-1, INPUT, DOWN);
PIN_SLP(gpj4-2, PREV, NONE);
PIN_SLP(gpj4-3, INPUT, NONE);
PIN_SLP(gpj4-4, INPUT, DOWN);
PIN_SLP(mp01-0, INPUT, DOWN);
PIN_SLP(mp01-1, OUT0, NONE);
PIN_SLP(mp01-2, INPUT, DOWN);
PIN_SLP(mp01-3, INPUT, DOWN);
PIN_SLP(mp01-4, OUT1, NONE);
PIN_SLP(mp01-5, INPUT, DOWN);
PIN_SLP(mp01-6, INPUT, DOWN);
PIN_SLP(mp01-7, INPUT, DOWN);
PIN_SLP(mp02-0, INPUT, DOWN);
PIN_SLP(mp02-1, INPUT, DOWN);
PIN_SLP(mp02-2, INPUT, NONE);
PIN_SLP(mp02-3, INPUT, DOWN);
PIN_SLP(mp03-0, INPUT, DOWN);
PIN_SLP(mp03-1, INPUT, DOWN);
PIN_SLP(mp03-2, OUT1, NONE);
PIN_SLP(mp03-3, OUT0, NONE);
PIN_SLP(mp03-4, INPUT, NONE);
PIN_SLP(mp03-5, OUT1, NONE);
PIN_SLP(mp03-6, INPUT, DOWN);
PIN_SLP(mp03-7, INPUT, DOWN);
PIN_SLP(mp04-0, INPUT, DOWN);
PIN_SLP(mp04-1, OUT0, NONE);
PIN_SLP(mp04-2, INPUT, DOWN);
PIN_SLP(mp04-3, OUT0, NONE);
PIN_SLP(mp04-4, INPUT, DOWN);
PIN_SLP(mp04-5, INPUT, DOWN);
PIN_SLP(mp04-6, OUT0, NONE);
PIN_SLP(mp04-7, INPUT, DOWN);
PIN_SLP(mp05-0, INPUT, NONE);
PIN_SLP(mp05-1, INPUT, NONE);
PIN_SLP(mp05-2, INPUT, NONE);
PIN_SLP(mp05-3, INPUT, NONE);
PIN_SLP(mp05-4, INPUT, DOWN);
PIN_SLP(mp05-5, OUT0, NONE);
PIN_SLP(mp05-6, INPUT, DOWN);
PIN_SLP(mp05-7, PREV, NONE);
PIN_SLP(mp06-0, INPUT, DOWN);
PIN_SLP(mp06-1, INPUT, DOWN);
PIN_SLP(mp06-2, INPUT, DOWN);
PIN_SLP(mp06-3, INPUT, DOWN);
PIN_SLP(mp06-4, INPUT, DOWN);
PIN_SLP(mp06-5, INPUT, DOWN);
PIN_SLP(mp06-6, INPUT, DOWN);
PIN_SLP(mp06-7, INPUT, DOWN);
PIN_SLP(mp07-0, INPUT, DOWN);
PIN_SLP(mp07-1, INPUT, DOWN);
PIN_SLP(mp07-2, INPUT, DOWN);
PIN_SLP(mp07-3, INPUT, DOWN);
PIN_SLP(mp07-4, INPUT, DOWN);
PIN_SLP(mp07-5, INPUT, DOWN);
PIN_SLP(mp07-6, INPUT, DOWN);
PIN_SLP(mp07-7, INPUT, DOWN);
};
};
&sdhci0 {
......@@ -67,4 +355,8 @@ &sdhci0 {
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clocks MOUT_MMC0>, <&clocks SCLK_MMC0>;
assigned-clock-rates = <0>, <52000000>;
assigned-clock-parents = <&clocks MOUT_MPLL>;
};
arch/arm/boot/dts/s5pv210-pinctrl.dtsi
View file @ ca6bc7a1
......@@ -18,6 +18,13 @@
#include <dt-bindings/pinctrl/samsung.h>
#define PIN_SLP(_pin, _mode, _pull) \
_pin { \
samsung,pins = #_pin; \
samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
samsung,pin-pud-pdn = <S3C64XX_PIN_PULL_ ##_pull>; \
}
&pinctrl0 {
gpa0: gpa0 {
gpio-controller;
......@@ -195,7 +202,7 @@ gpj4: gpj4 {
#interrupt-cells = <2>;
};
gpgi: gpgi {
gpi: gpi {
gpio-controller;
#gpio-cells = <2>;
};
......
arch/arm/boot/dts/s5pv210.dtsi
View file @ ca6bc7a1
......@@ -159,6 +159,18 @@ pdma1: dma@e0a00000 {
};
};
adc: adc@e1700000 {
compatible = "samsung,s5pv210-adc";
reg = <0xe1700000 0x1000>;
interrupt-parent = <&vic2>;
interrupts = <23>, <24>;
clocks = <&clocks CLK_TSADC>;
clock-names = "adc";
#io-channel-cells = <1>;
io-channel-ranges;
status = "disabled";
};
spi0: spi@e1300000 {
compatible = "samsung,s5pv210-spi";
reg = <0xe1300000 0x1000>;
......@@ -614,7 +626,7 @@ fimc0: fimc@fb200000 {
clock-names = "fimc",
"sclk_fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,min-pix-alignment = <16 8>;
samsung,cam-if;
};
......@@ -628,8 +640,10 @@ fimc1: fimc@fb300000 {
clock-names = "fimc",
"sclk_fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,min-pix-alignment = <1 1>;
samsung,mainscaler-ext;
samsung,cam-if;
samsung,lcd-wb;
};
fimc2: fimc@fb400000 {
......@@ -641,9 +655,10 @@ fimc2: fimc@fb400000 {
<&clocks SCLK_FIMC2>;
clock-names = "fimc",
"sclk_fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,lcd-wb;
samsung,pix-limits = <1920 8192 1280 1920>;
samsung,min-pix-alignment = <16 8>;
samsung,rotators = <0>;
samsung,cam-if;
};
};
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7