Commit cb7a73fd authored by Steven Cole's avatar Steven Cole Committed by David Woodhouse

[PATCH] Spelling fixes for relevent -> relevant

This patch provides spelling fixes for the following:

relevent    -> relevant
irrelevent  -> irrelevant
parent 5419be6f
...@@ -426,7 +426,7 @@ Ldata_do: mov r3, sp ...@@ -426,7 +426,7 @@ Ldata_do: mov r3, sp
mov r2, #0 mov r2, #0
tst r4, #1 << 20 @ Check to see if it is a write instruction tst r4, #1 << 20 @ Check to see if it is a write instruction
orreq r2, r2, #FAULT_CODE_WRITE @ Indicate write instruction orreq r2, r2, #FAULT_CODE_WRITE @ Indicate write instruction
mov r1, r4, lsr #22 @ Now branch to the relevent processing routine mov r1, r4, lsr #22 @ Now branch to the relevant processing routine
and r1, r1, #15 << 2 and r1, r1, #15 << 2
add pc, pc, r1 add pc, pc, r1
movs pc, lr movs pc, lr
......
...@@ -1026,7 +1026,7 @@ vector_IRQ: @ ...@@ -1026,7 +1026,7 @@ vector_IRQ: @
mrs lr, spsr mrs lr, spsr
str lr, [r13, #4] @ save spsr_IRQ str lr, [r13, #4] @ save spsr_IRQ
@ @
@ now branch to the relevent MODE handling routine @ now branch to the relevant MODE handling routine
@ @
mov r13, #PSR_I_BIT | MODE_SVC mov r13, #PSR_I_BIT | MODE_SVC
msr spsr_c, r13 @ switch to SVC_32 mode msr spsr_c, r13 @ switch to SVC_32 mode
...@@ -1067,7 +1067,7 @@ vector_data: @ ...@@ -1067,7 +1067,7 @@ vector_data: @
mrs lr, spsr mrs lr, spsr
str lr, [r13, #4] str lr, [r13, #4]
@ @
@ now branch to the relevent MODE handling routine @ now branch to the relevant MODE handling routine
@ @
mov r13, #PSR_I_BIT | MODE_SVC mov r13, #PSR_I_BIT | MODE_SVC
msr spsr_c, r13 @ switch to SVC_32 mode msr spsr_c, r13 @ switch to SVC_32 mode
...@@ -1109,7 +1109,7 @@ vector_prefetch: ...@@ -1109,7 +1109,7 @@ vector_prefetch:
mrs lr, spsr mrs lr, spsr
str lr, [r13, #4] @ save spsr_ABT str lr, [r13, #4] @ save spsr_ABT
@ @
@ now branch to the relevent MODE handling routine @ now branch to the relevant MODE handling routine
@ @
mov r13, #PSR_I_BIT | MODE_SVC mov r13, #PSR_I_BIT | MODE_SVC
msr spsr_c, r13 @ switch to SVC_32 mode msr spsr_c, r13 @ switch to SVC_32 mode
...@@ -1150,7 +1150,7 @@ vector_undefinstr: ...@@ -1150,7 +1150,7 @@ vector_undefinstr:
mrs lr, spsr mrs lr, spsr
str lr, [r13, #4] @ save spsr_UND str lr, [r13, #4] @ save spsr_UND
@ @
@ now branch to the relevent MODE handling routine @ now branch to the relevant MODE handling routine
@ @
mov r13, #PSR_I_BIT | MODE_SVC mov r13, #PSR_I_BIT | MODE_SVC
msr spsr_c, r13 @ switch to SVC_32 mode msr spsr_c, r13 @ switch to SVC_32 mode
......
...@@ -97,7 +97,7 @@ ENTRY(cpu_arm7_data_abort) ...@@ -97,7 +97,7 @@ ENTRY(cpu_arm7_data_abort)
tst r4, r4, lsr #21 @ C = bit 20 tst r4, r4, lsr #21 @ C = bit 20
sbc r1, r1, r1 @ r1 = C - 1 sbc r1, r1, r1 @ r1 = C - 1
and r2, r4, #15 << 24 and r2, r4, #15 << 24
add pc, pc, r2, lsr #22 @ Now branch to the relevent processing routine add pc, pc, r2, lsr #22 @ Now branch to the relevant processing routine
movs pc, lr movs pc, lr
b Ldata_unknown b Ldata_unknown
......
...@@ -61,7 +61,7 @@ void ma_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) ...@@ -61,7 +61,7 @@ void ma_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
specific chips may have more). */ specific chips may have more). */
if (chan < 2) { if (chan < 2) {
unsigned bits = 0x3 << (chan * 3); unsigned bits = 0x3 << (chan * 3);
/* Specify that the relevent pins on the chip should do /* Specify that the relevant pins on the chip should do
serial I/O, not direct I/O. */ serial I/O, not direct I/O. */
MA_PORT4_PMC |= bits; MA_PORT4_PMC |= bits;
/* Specify that we're using the UART, not the CSI device. */ /* Specify that we're using the UART, not the CSI device. */
......
...@@ -93,7 +93,7 @@ void __init mach_init_irqs (void) ...@@ -93,7 +93,7 @@ void __init mach_init_irqs (void)
/* Turn on the timer. */ /* Turn on the timer. */
NB85E_TIMER_C_TMCC0 (tc) |= NB85E_TIMER_C_TMCC0_CAE; NB85E_TIMER_C_TMCC0 (tc) |= NB85E_TIMER_C_TMCC0_CAE;
/* Make sure the relevent port0/port1 pins are assigned /* Make sure the relevant port0/port1 pins are assigned
interrupt duty. We used INTP001-INTP011 (don't screw with interrupt duty. We used INTP001-INTP011 (don't screw with
INTP000 because the monitor uses it). */ INTP000 because the monitor uses it). */
MA_PORT0_PMC |= 0x4; /* P02 (INTP001) in IRQ mode. */ MA_PORT0_PMC |= 0x4; /* P02 (INTP001) in IRQ mode. */
......
...@@ -370,7 +370,7 @@ acpi_set_register ( ...@@ -370,7 +370,7 @@ acpi_set_register (
/* /*
* Status Registers are different from the rest. Clear by * Status Registers are different from the rest. Clear by
* writing 1, writing 0 has no effect. So, the only relevent * writing 1, writing 0 has no effect. So, the only relevant
* information is the single bit we're interested in, all others should * information is the single bit we're interested in, all others should
* be written as 0 so they will be left unchanged * be written as 0 so they will be left unchanged
*/ */
......
...@@ -111,7 +111,7 @@ static char *_rio_list_h_sccs = "@(#)list.h 1.9" ; ...@@ -111,7 +111,7 @@ static char *_rio_list_h_sccs = "@(#)list.h 1.9" ;
/* /*
** can_remove_receive( PacketP, PortP ) returns non-zero if PKT_IN_USE is set ** can_remove_receive( PacketP, PortP ) returns non-zero if PKT_IN_USE is set
** for the next packet on the queue. It will also set PacketP to point to the ** for the next packet on the queue. It will also set PacketP to point to the
** relevent packet, [having cleared the PKT_IN_USE bit]. If PKT_IN_USE is clear, ** relevant packet, [having cleared the PKT_IN_USE bit]. If PKT_IN_USE is clear,
** then can_remove_receive() returns 0. ** then can_remove_receive() returns 0.
*/ */
#if defined(MIPS) || defined(nx6000) || defined(drs6000) || defined(UWsparc) #if defined(MIPS) || defined(nx6000) || defined(drs6000) || defined(UWsparc)
......
...@@ -714,7 +714,7 @@ PKT *PktP; ...@@ -714,7 +714,7 @@ PKT *PktP;
/* /*
** can_remove_receive(PktP,P) returns non-zero if PKT_IN_USE is set ** can_remove_receive(PktP,P) returns non-zero if PKT_IN_USE is set
** for the next packet on the queue. It will also set PktP to point to the ** for the next packet on the queue. It will also set PktP to point to the
** relevent packet, [having cleared the PKT_IN_USE bit]. If PKT_IN_USE is clear, ** relevant packet, [having cleared the PKT_IN_USE bit]. If PKT_IN_USE is clear,
** then can_remove_receive() returns 0. ** then can_remove_receive() returns 0.
*/ */
int int
......
...@@ -521,7 +521,7 @@ int RIORouteRup( struct rio_info *p, uint Rup, struct Host *HostP, PKT *PacketP ...@@ -521,7 +521,7 @@ int RIORouteRup( struct rio_info *p, uint Rup, struct Host *HostP, PKT *PacketP
/* /*
** If either of the modules on this unit is read-only or write-only ** If either of the modules on this unit is read-only or write-only
** or none-xprint, then we need to transfer that info over to the ** or none-xprint, then we need to transfer that info over to the
** relevent ports. ** relevant ports.
*/ */
if ( HostP->Mapping[ThisUnit].SysPort != NO_PORT ) if ( HostP->Mapping[ThisUnit].SysPort != NO_PORT )
{ {
......
...@@ -758,7 +758,7 @@ static int iic_xfer(struct i2c_adapter *i2c_adap, ...@@ -758,7 +758,7 @@ static int iic_xfer(struct i2c_adapter *i2c_adap,
// Check to see if the bus is busy // Check to see if the bus is busy
// //
ret = iic_inb(adap, iic->extsts); ret = iic_inb(adap, iic->extsts);
// Mask off the irrelevent bits // Mask off the irrelevant bits
ret = ret & 0x70; ret = ret & 0x70;
// When the bus is free, the BCS bits in the EXTSTS register are 0b100 // When the bus is free, the BCS bits in the EXTSTS register are 0b100
if(ret != 0x40) return IIC_ERR_LOST_ARB; if(ret != 0x40) return IIC_ERR_LOST_ARB;
......
...@@ -34,7 +34,7 @@ ...@@ -34,7 +34,7 @@
* end-of-frame would occur), so the transmitter performs * end-of-frame would occur), so the transmitter performs
* "bit-stuffing" - inserting a zero bit after every five one bits, * "bit-stuffing" - inserting a zero bit after every five one bits,
* irregardless of the original bit after the five ones. Byte * irregardless of the original bit after the five ones. Byte
* ordering is irrelevent at this point - the data is treated as a * ordering is irrelevant at this point - the data is treated as a
* string of bits, not bytes. Since no more than 5 ones may now occur * string of bits, not bytes. Since no more than 5 ones may now occur
* in a row, the flag sequence, with its 6 ones, is unique. * in a row, the flag sequence, with its 6 ones, is unique.
* *
......
...@@ -327,7 +327,7 @@ static void sa1100_int(int irq, void *dev_id, struct pt_regs *regs) ...@@ -327,7 +327,7 @@ static void sa1100_int(int irq, void *dev_id, struct pt_regs *regs)
sa1100_rx_chars(sport, regs); sa1100_rx_chars(sport, regs);
} }
/* Clear the relevent break bits */ /* Clear the relevant break bits */
if (status & (UTSR0_RBB | UTSR0_REB)) if (status & (UTSR0_RBB | UTSR0_REB))
UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB)); UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
......
...@@ -259,7 +259,7 @@ adfs_obj2dir(struct adfs_direntry *de, struct object_info *obj) ...@@ -259,7 +259,7 @@ adfs_obj2dir(struct adfs_direntry *de, struct object_info *obj)
/* /*
* get a directory entry. Note that the caller is responsible * get a directory entry. Note that the caller is responsible
* for holding the relevent locks. * for holding the relevant locks.
*/ */
int int
__adfs_dir_get(struct adfs_dir *dir, int pos, struct object_info *obj) __adfs_dir_get(struct adfs_dir *dir, int pos, struct object_info *obj)
......
...@@ -272,7 +272,7 @@ int afs_vnode_fetch_data(afs_vnode_t *vnode, struct afs_rxfs_fetch_descriptor *d ...@@ -272,7 +272,7 @@ int afs_vnode_fetch_data(afs_vnode_t *vnode, struct afs_rxfs_fetch_descriptor *d
/*****************************************************************************/ /*****************************************************************************/
/* /*
* break any outstanding callback on a vnode * break any outstanding callback on a vnode
* - only relevent to server that issued it * - only relevant to server that issued it
*/ */
int afs_vnode_give_up_callback(afs_vnode_t *vnode) int afs_vnode_give_up_callback(afs_vnode_t *vnode)
{ {
......
...@@ -39,7 +39,7 @@ ...@@ -39,7 +39,7 @@
/* /*
* We use this hashed waitqueue instead of a normal wait_queue_t, so * We use this hashed waitqueue instead of a normal wait_queue_t, so
* we can wake only the relevent ones (hashed queues may be shared): * we can wake only the relevant ones (hashed queues may be shared):
*/ */
struct futex_q { struct futex_q {
struct list_head list; struct list_head list;
......
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