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Commit cb877250 authored by Jes Sorensen's avatar Jes Sorensen Committed by Kalle Valo
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rtl8xxxu: Split rtl8xxxu_init_phy_bb() into device specific functions 

This reduces the if () clutter. Longer term it probably makes sense to
split this between gen1 (8723au/8188cu/8192cu) and gen2
(8192eu/8723bu) devices.
Signed-off-by: default avatarJes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent bd8fe40c
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Showing with 77 additions and 58 deletions
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
View file @ cb877250
...@@ -3717,76 +3717,36 @@ static int rtl8xxxu_init_phy_regs(struct rtl8xxxu_priv *priv, ...@@ -3717,76 +3717,36 @@ static int rtl8xxxu_init_phy_regs(struct rtl8xxxu_priv *priv,
return 0; return 0;
} }
/* static void rtl8723au_init_phy_bb(struct rtl8xxxu_priv *priv)
* Most of this is black magic retrieved from the old rtl8723au driver
*/
static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv)
{ {
u8 val8, ldoa15, ldov12d, lpldo, ldohci12; u8 val8;
u16 val16; u16 val16;
u32 val32; u32 val32;
/* val8 = rtl8xxxu_read8(priv, REG_AFE_PLL_CTRL);
* Todo: The vendor driver maintains a table of PHY register udelay(2);
* addresses, which is initialized here. Do we need this? val8 |= AFE_PLL_320_ENABLE;
*/ rtl8xxxu_write8(priv, REG_AFE_PLL_CTRL, val8);
udelay(2);
if (priv->rtl_chip == RTL8723B) {
val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
val16 |= SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB |
SYS_FUNC_DIO_RF;
rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00);
} else if (priv->rtl_chip == RTL8192E) {
val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
val16 |= SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB |
SYS_FUNC_DIO_RF;
rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
} else {
val8 = rtl8xxxu_read8(priv, REG_AFE_PLL_CTRL);
udelay(2);
val8 |= AFE_PLL_320_ENABLE;
rtl8xxxu_write8(priv, REG_AFE_PLL_CTRL, val8);
udelay(2);
rtl8xxxu_write8(priv, REG_AFE_PLL_CTRL + 1, 0xff); rtl8xxxu_write8(priv, REG_AFE_PLL_CTRL + 1, 0xff);
udelay(2); udelay(2);
val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC); val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
val16 |= SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB; val16 |= SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB;
rtl8xxxu_write16(priv, REG_SYS_FUNC, val16); rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
}
if (priv->rtl_chip != RTL8723B && priv->rtl_chip != RTL8192E) { val32 = rtl8xxxu_read32(priv, REG_AFE_XTAL_CTRL);
/* AFE_XTAL_RF_GATE (bit 14) if addressing as 32 bit register */ val32 &= ~AFE_XTAL_RF_GATE;
val32 = rtl8xxxu_read32(priv, REG_AFE_XTAL_CTRL); if (priv->has_bluetooth)
val32 &= ~AFE_XTAL_RF_GATE; val32 &= ~AFE_XTAL_BT_GATE;
if (priv->has_bluetooth) rtl8xxxu_write32(priv, REG_AFE_XTAL_CTRL, val32);
val32 &= ~AFE_XTAL_BT_GATE;
rtl8xxxu_write32(priv, REG_AFE_XTAL_CTRL, val32);
}
/* 6. 0x1f[7:0] = 0x07 */ /* 6. 0x1f[7:0] = 0x07 */
val8 = RF_ENABLE | RF_RSTB | RF_SDMRSTB; val8 = RF_ENABLE | RF_RSTB | RF_SDMRSTB;
rtl8xxxu_write8(priv, REG_RF_CTRL, val8); rtl8xxxu_write8(priv, REG_RF_CTRL, val8);
if (priv->rtl_chip == RTL8723B) { if (priv->hi_pa)
/*
* Why?
*/
rtl8xxxu_write8(priv, REG_SYS_FUNC, 0xe3);
rtl8xxxu_write8(priv, REG_AFE_XTAL_CTRL + 1, 0x80);
rtl8xxxu_init_phy_regs(priv, rtl8723b_phy_1t_init_table);
} else if (priv->rtl_chip == RTL8192E) {
val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
val16 |= (SYS_FUNC_USBA | SYS_FUNC_USBD | SYS_FUNC_DIO_RF |
SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB);
rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
val8 = RF_ENABLE | RF_RSTB | RF_SDMRSTB;
rtl8xxxu_write8(priv, REG_RF_CTRL, val8);
rtl8xxxu_init_phy_regs(priv, rtl8192eu_phy_init_table);
} else if (priv->hi_pa)
rtl8xxxu_init_phy_regs(priv, rtl8188ru_phy_1t_highpa_table); rtl8xxxu_init_phy_regs(priv, rtl8188ru_phy_1t_highpa_table);
else if (priv->tx_paths == 2) else if (priv->tx_paths == 2)
rtl8xxxu_init_phy_regs(priv, rtl8192cu_phy_2t_init_table); rtl8xxxu_init_phy_regs(priv, rtl8192cu_phy_2t_init_table);
...@@ -3796,6 +3756,60 @@ static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv) ...@@ -3796,6 +3756,60 @@ static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv)
if (priv->rtl_chip == RTL8188C && priv->hi_pa && if (priv->rtl_chip == RTL8188C && priv->hi_pa &&
priv->vendor_umc && priv->chip_cut == 1) priv->vendor_umc && priv->chip_cut == 1)
rtl8xxxu_write8(priv, REG_OFDM0_AGC_PARM1 + 2, 0x50); rtl8xxxu_write8(priv, REG_OFDM0_AGC_PARM1 + 2, 0x50);
}
static void rtl8723bu_init_phy_bb(struct rtl8xxxu_priv *priv)
{
u8 val8;
u16 val16;
val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
val16 |= SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB | SYS_FUNC_DIO_RF;
rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00);
/* 6. 0x1f[7:0] = 0x07 */
val8 = RF_ENABLE | RF_RSTB | RF_SDMRSTB;
rtl8xxxu_write8(priv, REG_RF_CTRL, val8);
/* Why? */
rtl8xxxu_write8(priv, REG_SYS_FUNC, 0xe3);
rtl8xxxu_write8(priv, REG_AFE_XTAL_CTRL + 1, 0x80);
rtl8xxxu_init_phy_regs(priv, rtl8723b_phy_1t_init_table);
}
static void rtl8192eu_init_phy_bb(struct rtl8xxxu_priv *priv)
{
u8 val8;
u16 val16;
val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
val16 |= SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB | SYS_FUNC_DIO_RF;
rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
/* 6. 0x1f[7:0] = 0x07 */
val8 = RF_ENABLE | RF_RSTB | RF_SDMRSTB;
rtl8xxxu_write8(priv, REG_RF_CTRL, val8);
val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
val16 |= (SYS_FUNC_USBA | SYS_FUNC_USBD | SYS_FUNC_DIO_RF |
SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB);
rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
val8 = RF_ENABLE | RF_RSTB | RF_SDMRSTB;
rtl8xxxu_write8(priv, REG_RF_CTRL, val8);
rtl8xxxu_init_phy_regs(priv, rtl8192eu_phy_init_table);
}
/*
* Most of this is black magic retrieved from the old rtl8723au driver
*/
static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv)
{
u8 val8, ldoa15, ldov12d, lpldo, ldohci12;
u32 val32;
priv->fops->init_phy_bb(priv);
if (priv->tx_paths == 1 && priv->rx_paths == 2) { if (priv->tx_paths == 1 && priv->rx_paths == 2) {
/* /*
...@@ -9709,6 +9723,7 @@ static struct rtl8xxxu_fileops rtl8723au_fops = { ...@@ -9709,6 +9723,7 @@ static struct rtl8xxxu_fileops rtl8723au_fops = {
.power_off = rtl8xxxu_power_off, .power_off = rtl8xxxu_power_off,
.reset_8051 = rtl8xxxu_reset_8051, .reset_8051 = rtl8xxxu_reset_8051,
.llt_init = rtl8xxxu_init_llt_table, .llt_init = rtl8xxxu_init_llt_table,
.init_phy_bb = rtl8723au_init_phy_bb,
.phy_iq_calibrate = rtl8723au_phy_iq_calibrate, .phy_iq_calibrate = rtl8723au_phy_iq_calibrate,
.config_channel = rtl8723au_config_channel, .config_channel = rtl8723au_config_channel,
.parse_rx_desc = rtl8xxxu_parse_rxdesc16, .parse_rx_desc = rtl8xxxu_parse_rxdesc16,
...@@ -9736,6 +9751,7 @@ static struct rtl8xxxu_fileops rtl8723bu_fops = { ...@@ -9736,6 +9751,7 @@ static struct rtl8xxxu_fileops rtl8723bu_fops = {
.power_off = rtl8723bu_power_off, .power_off = rtl8723bu_power_off,
.reset_8051 = rtl8723bu_reset_8051, .reset_8051 = rtl8723bu_reset_8051,
.llt_init = rtl8xxxu_auto_llt_table, .llt_init = rtl8xxxu_auto_llt_table,
.init_phy_bb = rtl8723bu_init_phy_bb,
.phy_init_antenna_selection = rtl8723bu_phy_init_antenna_selection, .phy_init_antenna_selection = rtl8723bu_phy_init_antenna_selection,
.phy_iq_calibrate = rtl8723bu_phy_iq_calibrate, .phy_iq_calibrate = rtl8723bu_phy_iq_calibrate,
.config_channel = rtl8723bu_config_channel, .config_channel = rtl8723bu_config_channel,
...@@ -9769,6 +9785,7 @@ static struct rtl8xxxu_fileops rtl8192cu_fops = { ...@@ -9769,6 +9785,7 @@ static struct rtl8xxxu_fileops rtl8192cu_fops = {
.power_off = rtl8xxxu_power_off, .power_off = rtl8xxxu_power_off,
.reset_8051 = rtl8xxxu_reset_8051, .reset_8051 = rtl8xxxu_reset_8051,
.llt_init = rtl8xxxu_init_llt_table, .llt_init = rtl8xxxu_init_llt_table,
.init_phy_bb = rtl8723au_init_phy_bb,
.phy_iq_calibrate = rtl8723au_phy_iq_calibrate, .phy_iq_calibrate = rtl8723au_phy_iq_calibrate,
.config_channel = rtl8723au_config_channel, .config_channel = rtl8723au_config_channel,
.parse_rx_desc = rtl8xxxu_parse_rxdesc16, .parse_rx_desc = rtl8xxxu_parse_rxdesc16,
...@@ -9798,6 +9815,7 @@ static struct rtl8xxxu_fileops rtl8192eu_fops = { ...@@ -9798,6 +9815,7 @@ static struct rtl8xxxu_fileops rtl8192eu_fops = {
.power_off = rtl8xxxu_power_off, .power_off = rtl8xxxu_power_off,
.reset_8051 = rtl8xxxu_reset_8051, .reset_8051 = rtl8xxxu_reset_8051,
.llt_init = rtl8xxxu_auto_llt_table, .llt_init = rtl8xxxu_auto_llt_table,
.init_phy_bb = rtl8192eu_init_phy_bb,
.phy_iq_calibrate = rtl8192eu_phy_iq_calibrate, .phy_iq_calibrate = rtl8192eu_phy_iq_calibrate,
.config_channel = rtl8723bu_config_channel, .config_channel = rtl8723bu_config_channel,
.parse_rx_desc = rtl8xxxu_parse_rxdesc24, .parse_rx_desc = rtl8xxxu_parse_rxdesc24,
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
View file @ cb877250
...@@ -1284,6 +1284,7 @@ struct rtl8xxxu_fileops { ...@@ -1284,6 +1284,7 @@ struct rtl8xxxu_fileops {
void (*power_off) (struct rtl8xxxu_priv *priv); void (*power_off) (struct rtl8xxxu_priv *priv);
void (*reset_8051) (struct rtl8xxxu_priv *priv); void (*reset_8051) (struct rtl8xxxu_priv *priv);
int (*llt_init) (struct rtl8xxxu_priv *priv, u8 last_tx_page); int (*llt_init) (struct rtl8xxxu_priv *priv, u8 last_tx_page);
void (*init_phy_bb) (struct rtl8xxxu_priv *priv);
void (*phy_init_antenna_selection) (struct rtl8xxxu_priv *priv); void (*phy_init_antenna_selection) (struct rtl8xxxu_priv *priv);
void (*phy_iq_calibrate) (struct rtl8xxxu_priv *priv); void (*phy_iq_calibrate) (struct rtl8xxxu_priv *priv);
void (*config_channel) (struct ieee80211_hw *hw); void (*config_channel) (struct ieee80211_hw *hw);
......
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