[ARM PATCH] 2491/1: make ixp2000 use section mappings for on-chip registers

Patch from Lennert Buytenhek

This patch makes the ixp2000 port use section mappings for on-chip
registers.  This has two advantages:
1. It saves some TLB entries.
2. It enables us to work around ixp2400 erratum #66, for which the
   suggested (and only) fix involves mapping all on-chip registers
   using XCB=101 instead of XCB=000.
This patch was derived from an older patch for the same erratum
(ARM patch ID 2265/1), made by Deepak Saxena.
Note that this patch does not actually constitute a workaround for
erratum #66, it merely lays the foundation for such a workaround.

Signed-off-by: Lennert BuytenhekSigned-off-by: Deepak Saxena
Signed-off-by: Russell King

arch/arm/mach-ixp2000/core.c

@@ -79,31 +79,11 @@ void ixp2000_release_slowport(struct slowport_cfg *old_cfg)
 /*************************************************************************
  * Chip specific mappings shared by all IXP2000 systems
  *************************************************************************/
-static struct map_desc ixp2000_small_io_desc[] __initdata = {
+static struct map_desc ixp2000_io_desc[] __initdata = {
 	{
-		.virtual	= IXP2000_GLOBAL_REG_VIRT_BASE,
-		.physical	= IXP2000_GLOBAL_REG_PHYS_BASE,
-		.length		= IXP2000_GLOBAL_REG_SIZE,
-		.type		= MT_DEVICE
-	}, {
-		.virtual	= IXP2000_GPIO_VIRT_BASE,
-		.physical	= IXP2000_GPIO_PHYS_BASE,
-		.length		= IXP2000_GPIO_SIZE,
-		.type		= MT_DEVICE
-	}, {
-		.virtual	= IXP2000_TIMER_VIRT_BASE,
-		.physical	= IXP2000_TIMER_PHYS_BASE,
-		.length		= IXP2000_TIMER_SIZE,
-		.type		= MT_DEVICE
-	}, {
-		.virtual	= IXP2000_UART_VIRT_BASE,
-		.physical	= IXP2000_UART_PHYS_BASE,
-		.length		= IXP2000_UART_SIZE,
-		.type		= MT_DEVICE
-	}, {
-		.virtual	= IXP2000_SLOWPORT_CSR_VIRT_BASE,
-		.physical	= IXP2000_SLOWPORT_CSR_PHYS_BASE,
-		.length		= IXP2000_SLOWPORT_CSR_SIZE,
+		.virtual	= IXP2000_CAP_VIRT_BASE,
+		.physical	= IXP2000_CAP_PHYS_BASE,
+		.length		= IXP2000_CAP_SIZE,
 		.type		= MT_DEVICE
 	}, {
 		.virtual	= IXP2000_INTCTL_VIRT_BASE,
@@ -115,11 +95,7 @@ static struct map_desc ixp2000_small_io_desc[] __initdata = {
 		.physical	= IXP2000_PCI_CREG_PHYS_BASE,
 		.length		= IXP2000_PCI_CREG_SIZE,
 		.type		= MT_DEVICE
-	}
-};
-
-static struct map_desc ixp2000_large_io_desc[] __initdata = {
-	{
+	}, {
 		.virtual	= IXP2000_PCI_CSR_VIRT_BASE,
 		.physical	= IXP2000_PCI_CSR_PHYS_BASE,
 		.length		= IXP2000_PCI_CSR_SIZE,
@@ -157,8 +133,7 @@ static struct uart_port ixp2000_serial_port = {
 
 void __init ixp2000_map_io(void)
 {
-	iotable_init(ixp2000_small_io_desc, ARRAY_SIZE(ixp2000_small_io_desc));
-	iotable_init(ixp2000_large_io_desc, ARRAY_SIZE(ixp2000_large_io_desc));
+	iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
 	early_serial_setup(&ixp2000_serial_port);
 
 	/* Set slowport to 8-bit mode.  */

include/asm-arm/arch-ixp2000/entry-macro.S

@@ -15,8 +15,7 @@
 
 		mov	\irqnr, #0x0              @clear out irqnr as default
                 mov	\base, #0xfe000000
-		orr	\base, \base, #0x00ff0000
-		orr	\base, \base, #0x0000a000
+		orr	\base, \base, #0x00e00000
 		orr	\base, \base, #0x08
 		ldr	\irqstat, [\base]         @ get interrupts
 
@@ -35,8 +34,8 @@
 		bne	1001f
 
 		mov	\base, #0xfe000000
-		orr	\base, \base, #0x00fd0000
-		orr	\base, \base, #0x0000e100
+		orr	\base, \base, #0x00c00000
+		orr	\base, \base, #0x00000100
 		orr	\base, \base, #0x00000058
 		ldr	\irqstat, [\base]
 

include/asm-arm/arch-ixp2000/ixdp2x00.h

@@ -21,7 +21,7 @@
  * On board CPLD memory map
  */
 #define IXDP2X00_PHYS_CPLD_BASE		0xc7000000
-#define IXDP2X00_VIRT_CPLD_BASE		0xfefdd000
+#define IXDP2X00_VIRT_CPLD_BASE		0xfafff000
 #define IXDP2X00_CPLD_SIZE		0x00001000
 
 

include/asm-arm/arch-ixp2000/ixdp2x01.h

@@ -18,8 +18,8 @@
 #define __IXDP2X01_H__
 
 #define	IXDP2X01_PHYS_CPLD_BASE		0xc6024000
-#define	IXDP2X01_VIRT_CPLD_BASE		0xfefdd000
-#define	IXDP2X01_CPLD_REGION_SIZE	0x1000
+#define	IXDP2X01_VIRT_CPLD_BASE		0xfafff000
+#define	IXDP2X01_CPLD_REGION_SIZE	0x00001000
 
 #define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg)
 #define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg)

include/asm-arm/arch-ixp2000/ixp2000-regs.h

@@ -19,41 +19,49 @@
 #define _IXP2000_REGS_H_
 
 /* 
- * Static I/O regions. The manual defines each region as being several
- * MB in size, but all the registers are within the first 4K, so there's
- * no purpose in mapping the whole region in.
+ * Static I/O regions.
+ *
+ * Most of the registers are clumped in 4K regions spread throughout
+ * the 0xc000000 -> 0xc0100000 address range, but we just map in
+ * the whole range using a single 1 MB section instead of small
+ * 4K pages.  This has two advantages for us:
+ *
+ * 1) We use only one TLB entry for large number of on-chip I/O devices.
+ *
+ * 2) We can easily set the Section attributes to XCB=101 on the IXP2400
+ *    as required per erratum #66.
+ *
+ * CAP stands for CSR Access Proxy
  */
-#define	IXP2000_SLOWPORT_CSR_PHYS_BASE	0xc0080000
-#define	IXP2000_SLOWPORT_CSR_VIRT_BASE	0xfefff000
-#define	IXP2000_SLOWPORT_CSR_SIZE	0x1000
 
-#define	IXP2000_GLOBAL_REG_PHYS_BASE	0xc0004000
-#define	IXP2000_GLOBAL_REG_VIRT_BASE	0xfeffe000
-#define	IXP2000_GLOBAL_REG_SIZE		0x1000
+#define	IXP2000_CAP_PHYS_BASE		0xc0000000
+#define	IXP2000_CAP_VIRT_BASE		0xfef00000
+#define	IXP2000_CAP_SIZE		0x00100000
 
+/*
+ * Addresses for specific on-chip peripherals
+ */
+#define	IXP2000_SLOWPORT_CSR_VIRT_BASE	0xfef80000
+#define	IXP2000_GLOBAL_REG_VIRT_BASE	0xfef04000
 #define	IXP2000_UART_PHYS_BASE		0xc0030000
 #define	IXP2000_UART_VIRT_BASE		0xfef30000
-#define IXP2000_UART_SIZE		0x1000
-
-#define	IXP2000_TIMER_PHYS_BASE		0xc0020000
-#define	IXP2000_TIMER_VIRT_BASE		0xfeffc000
-#define	IXP2000_TIMER_SIZE		0x1000
-
-#define	IXP2000_GPIO_PHYS_BASE		0xc0010000
-#define	IXP2000_GPIO_VIRT_BASE		0xfeffb000
-#define	IXP2000_GPIO_SIZE		0x1000
+#define	IXP2000_TIMER_VIRT_BASE		0xfef20000
+#define	IXP2000_GPIO_VIRT_BASE		0Xfef10000
 
+/*
+ * Devices outside of the 0xc0000000 -> 0xc0100000 range
+ */
 #define IXP2000_INTCTL_PHYS_BASE	0xd6000000
-#define	IXP2000_INTCTL_VIRT_BASE	0xfeffa000
-#define	IXP2000_INTCTL_SIZE		0x01000
+#define	IXP2000_INTCTL_VIRT_BASE	0xfee00000
+#define	IXP2000_INTCTL_SIZE		0x00100000
 
 #define IXP2000_PCI_CREG_PHYS_BASE	0xde000000
-#define	IXP2000_PCI_CREG_VIRT_BASE	0xfeff0000
-#define	IXP2000_PCI_CREG_SIZE		0x1000
+#define	IXP2000_PCI_CREG_VIRT_BASE	0xfed00000
+#define	IXP2000_PCI_CREG_SIZE		0x00100000
 
 #define IXP2000_PCI_CSR_PHYS_BASE	0xdf000000
-#define	IXP2000_PCI_CSR_VIRT_BASE	0xfefde000
-#define	IXP2000_PCI_CSR_SIZE		0x1000
+#define	IXP2000_PCI_CSR_VIRT_BASE	0xfec00000
+#define	IXP2000_PCI_CSR_SIZE		0x00100000
 
 #define IXP2000_PCI_IO_PHYS_BASE	0xd8000000
 #define	IXP2000_PCI_IO_VIRT_BASE	0xfd000000
@@ -67,7 +75,6 @@
 #define IXP2000_PCI_CFG1_VIRT_BASE	0xfb000000
 #define IXP2000_PCI_CFG1_SIZE		0x01000000
 
-
 /* 
  * Timers
  */

include/asm-arm/arch-ixp2000/vmalloc.h

@@ -20,4 +20,4 @@
 #define VMALLOC_OFFSET	    (8*1024*1024)
 #define VMALLOC_START	    (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
 #define VMALLOC_VMADDR(x)   ((unsigned long)(x))
-#define VMALLOC_END	    0xfb000000
+#define VMALLOC_END	    0xfaffefff