Commit cd4bd8f9 authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Krzysztof Kozlowski

ARM: s3c24xx: spi: avoid hardcoding fiq number in driver

The IRQ_EINT0 constant is a platform detail that is
defined in mach/irqs.h and not visible to drivers once
that header is made private.

Since the same calculation already happens in s3c24xx_set_fiq,
just return the value from there.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20200806182059.2431-31-krzk@kernel.orgSigned-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent b2a587cb
......@@ -376,14 +376,17 @@ asmlinkage void __exception_irq_entry s3c24xx_handle_irq(struct pt_regs *regs)
/**
* s3c24xx_set_fiq - set the FIQ routing
* @irq: IRQ number to route to FIQ on processor.
* @ack_ptr: pointer to a location for storing the bit mask
* @on: Whether to route @irq to the FIQ, or to remove the FIQ routing.
*
* Change the state of the IRQ to FIQ routing depending on @irq and @on. If
* @on is true, the @irq is checked to see if it can be routed and the
* interrupt controller updated to route the IRQ. If @on is false, the FIQ
* routing is cleared, regardless of which @irq is specified.
*
* returns the mask value for the register.
*/
int s3c24xx_set_fiq(unsigned int irq, bool on)
int s3c24xx_set_fiq(unsigned int irq, u32 *ack_ptr, bool on)
{
u32 intmod;
unsigned offs;
......@@ -391,15 +394,18 @@ int s3c24xx_set_fiq(unsigned int irq, bool on)
if (on) {
offs = irq - FIQ_START;
if (offs > 31)
return -EINVAL;
return 0;
intmod = 1 << offs;
} else {
intmod = 0;
}
if (ack_ptr)
*ack_ptr = intmod;
writel_relaxed(intmod, S3C2410_INTMOD);
return 0;
return intmod;
}
EXPORT_SYMBOL_GPL(s3c24xx_set_fiq);
......
......@@ -229,17 +229,6 @@ struct spi_fiq_code {
u8 data[];
};
/**
* ack_bit - turn IRQ into IRQ acknowledgement bit
* @irq: The interrupt number
*
* Returns the bit to write to the interrupt acknowledge register.
*/
static inline u32 ack_bit(unsigned int irq)
{
return 1 << (irq - IRQ_EINT0);
}
/**
* s3c24xx_spi_tryfiq - attempt to claim and setup FIQ for transfer
* @hw: The hardware state.
......@@ -256,6 +245,7 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
struct pt_regs regs;
enum spi_fiq_mode mode;
struct spi_fiq_code *code;
u32 *ack_ptr = NULL;
int ret;
if (!hw->fiq_claimed) {
......@@ -282,8 +272,6 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
set_fiq_regs(&regs);
if (hw->fiq_mode != mode) {
u32 *ack_ptr;
hw->fiq_mode = mode;
switch (mode) {
......@@ -303,12 +291,10 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
BUG_ON(!code);
ack_ptr = (u32 *)&code->data[code->ack_offset];
*ack_ptr = ack_bit(hw->irq);
set_fiq_handler(&code->data, code->length);
}
s3c24xx_set_fiq(hw->irq, true);
s3c24xx_set_fiq(hw->irq, ack_ptr, true);
hw->fiq_mode = mode;
hw->fiq_inuse = 1;
......
......@@ -20,6 +20,6 @@ struct s3c2410_spi_info {
void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
};
extern int s3c24xx_set_fiq(unsigned int irq, bool on);
extern int s3c24xx_set_fiq(unsigned int irq, u32 *ack_ptr, bool on);
#endif /* __LINUX_SPI_S3C24XX_H */
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