Commit cd5738dc authored by Jaroslav Kysela's avatar Jaroslav Kysela Committed by Jaroslav Kysela

[PATCH] ALSA update [11/12] - 2002/09/17

  - changed bitmap_member -> DECLARE_BITMAP
  - EMU10K1
    - added gpr_list_control* variables to emu10k1_fx8010_code_t
    - added snd_emu10k1_list_controls for code_peek() and fixes few typos
  - ICE1712
    - split ice1712 code to several files for better readability
parent a270c7b7
...@@ -25,6 +25,7 @@ ...@@ -25,6 +25,7 @@
* *
*/ */
#include <linux/bitops.h>
#include "control.h" #include "control.h"
#include "info.h" #include "info.h"
...@@ -246,7 +247,7 @@ struct _snd_ac97 { ...@@ -246,7 +247,7 @@ struct _snd_ac97 {
unsigned int spdif_status; unsigned int spdif_status;
unsigned short regs[0x80]; /* register cache */ unsigned short regs[0x80]; /* register cache */
unsigned int limited_regs; /* allow limited registers only */ unsigned int limited_regs; /* allow limited registers only */
bitmap_member(reg_accessed,0x80); /* bit flags */ DECLARE_BITMAP(reg_accessed, 0x80); /* bit flags */
union { /* vendor specific code */ union { /* vendor specific code */
struct { struct {
unsigned short unchained[3]; // 0 = C34, 1 = C79, 2 = C69 unsigned short unchained[3]; // 0 = C34, 1 = C79, 2 = C69
......
...@@ -1301,15 +1301,24 @@ typedef struct { ...@@ -1301,15 +1301,24 @@ typedef struct {
typedef struct { typedef struct {
char name[128]; char name[128];
unsigned long gpr_valid[0x100/(sizeof(unsigned long)*8)]; /* bitmask of valid initializers */ unsigned long gpr_valid[0x100/(sizeof(unsigned long)*8)]; /* bitmask of valid initializers */
unsigned int gpr_map[0x100]; /* initializers */ unsigned int gpr_map[0x100]; /* initializers */
unsigned int gpr_add_control_count; /* count of GPR controls to add/replace */ unsigned int gpr_add_control_count; /* count of GPR controls to add/replace */
emu10k1_fx8010_control_gpr_t *gpr_add_controls; /* GPR controls to add/replace */ emu10k1_fx8010_control_gpr_t *gpr_add_controls; /* GPR controls to add/replace */
unsigned int gpr_del_control_count; /* count of GPR controls to remove */ unsigned int gpr_del_control_count; /* count of GPR controls to remove */
snd_ctl_elem_id_t *gpr_del_controls; /* IDs of GPR controls to remove */ snd_ctl_elem_id_t *gpr_del_controls; /* IDs of GPR controls to remove */
unsigned int gpr_list_control_count; /* count of GPR controls to list */
unsigned int gpr_list_control_total; /* total count of GPR controls */
emu10k1_fx8010_control_gpr_t *gpr_list_controls; /* listed GPR controls */
unsigned long tram_valid[0xa0/(sizeof(unsigned long)*8)]; /* bitmask of valid initializers */ unsigned long tram_valid[0xa0/(sizeof(unsigned long)*8)]; /* bitmask of valid initializers */
unsigned int tram_data_map[0xa0]; /* data initializers */ unsigned int tram_data_map[0xa0]; /* data initializers */
unsigned int tram_addr_map[0xa0]; /* map initializers */ unsigned int tram_addr_map[0xa0]; /* map initializers */
unsigned long code_valid[512/(sizeof(unsigned long)*8)]; /* bitmask of valid instructions */ unsigned long code_valid[512/(sizeof(unsigned long)*8)]; /* bitmask of valid instructions */
unsigned int code[512][2]; /* one instruction - 64 bits */ unsigned int code[512][2]; /* one instruction - 64 bits */
} emu10k1_fx8010_code_t; } emu10k1_fx8010_code_t;
......
/* include/version.h. Generated automatically by configure. */ /* include/version.h. Generated automatically by configure. */
#define CONFIG_SND_VERSION "0.9.0rc3" #define CONFIG_SND_VERSION "0.9.0rc3"
#define CONFIG_SND_DATE " (Mon Sep 16 18:05:43 2002 UTC)" #define CONFIG_SND_DATE " (Tue Sep 17 13:46:32 2002 UTC)"
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
#define __SND_SEQ_CLIENTMGR_H #define __SND_SEQ_CLIENTMGR_H
#include <sound/seq_kernel.h> #include <sound/seq_kernel.h>
#include <linux/bitops.h>
#include "seq_fifo.h" #include "seq_fifo.h"
#include "seq_ports.h" #include "seq_ports.h"
#include "seq_lock.h" #include "seq_lock.h"
...@@ -53,7 +54,7 @@ struct _snd_seq_client { ...@@ -53,7 +54,7 @@ struct _snd_seq_client {
char name[64]; /* client name */ char name[64]; /* client name */
int number; /* client number */ int number; /* client number */
unsigned int filter; /* filter flags */ unsigned int filter; /* filter flags */
bitmap_member(event_filter, 256); DECLARE_BITMAP(event_filter, 256);
snd_use_lock_t use_lock; snd_use_lock_t use_lock;
int event_lost; int event_lost;
/* ports */ /* ports */
......
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
#include "seq_lock.h" #include "seq_lock.h"
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/list.h> #include <linux/list.h>
#include <linux/bitops.h>
#define SEQ_QUEUE_NO_OWNER (-1) #define SEQ_QUEUE_NO_OWNER (-1)
...@@ -51,7 +52,7 @@ struct _snd_seq_queue { ...@@ -51,7 +52,7 @@ struct _snd_seq_queue {
spinlock_t check_lock; spinlock_t check_lock;
/* clients which uses this queue (bitmap) */ /* clients which uses this queue (bitmap) */
bitmap_member(clients_bitmap, SNDRV_SEQ_MAX_CLIENTS); DECLARE_BITMAP(clients_bitmap, SNDRV_SEQ_MAX_CLIENTS);
unsigned int clients; /* users of this queue */ unsigned int clients; /* users of this queue */
struct semaphore timer_mutex; struct semaphore timer_mutex;
......
...@@ -923,7 +923,7 @@ static int snd_emu10k1_verify_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *ic ...@@ -923,7 +923,7 @@ static int snd_emu10k1_verify_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *ic
return -ENOENT; return -ENOENT;
} }
for (i = 0, _gctl = icode->gpr_add_controls; for (i = 0, _gctl = icode->gpr_add_controls;
i < icode->gpr_add_control_count; i++) { i < icode->gpr_add_control_count; i++, _gctl++) {
if (copy_from_user(&gctl, _gctl, sizeof(gctl))) if (copy_from_user(&gctl, _gctl, sizeof(gctl)))
return -EFAULT; return -EFAULT;
if (snd_emu10k1_look_for_ctl(emu, &gctl.id)) if (snd_emu10k1_look_for_ctl(emu, &gctl.id))
...@@ -934,6 +934,12 @@ static int snd_emu10k1_verify_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *ic ...@@ -934,6 +934,12 @@ static int snd_emu10k1_verify_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *ic
gctl.id.iface != SNDRV_CTL_ELEM_IFACE_PCM) gctl.id.iface != SNDRV_CTL_ELEM_IFACE_PCM)
return -EINVAL; return -EINVAL;
} }
for (i = 0, _gctl = icode->gpr_list_controls;
i < icode->gpr_list_control_count; i++, _gctl++) {
/* FIXME: we need to check the WRITE access */
if (copy_from_user(&gctl, _gctl, sizeof(gctl)))
return -EFAULT;
}
return 0; return 0;
} }
...@@ -968,6 +974,8 @@ static void snd_emu10k1_add_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *icod ...@@ -968,6 +974,8 @@ static void snd_emu10k1_add_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *icod
knew.iface = gctl.id.iface; knew.iface = gctl.id.iface;
knew.name = gctl.id.name; knew.name = gctl.id.name;
knew.index = gctl.id.index; knew.index = gctl.id.index;
knew.device = gctl.id.device;
knew.subdevice = gctl.id.subdevice;
knew.info = snd_emu10k1_gpr_ctl_info; knew.info = snd_emu10k1_gpr_ctl_info;
knew.get = snd_emu10k1_gpr_ctl_get; knew.get = snd_emu10k1_gpr_ctl_get;
knew.put = snd_emu10k1_gpr_ctl_put; knew.put = snd_emu10k1_gpr_ctl_put;
...@@ -976,7 +984,7 @@ static void snd_emu10k1_add_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *icod ...@@ -976,7 +984,7 @@ static void snd_emu10k1_add_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *icod
nctl.count = gctl.count; nctl.count = gctl.count;
for (j = 0; j < 32; j++) { for (j = 0; j < 32; j++) {
nctl.gpr[j] = gctl.gpr[j]; nctl.gpr[j] = gctl.gpr[j];
nctl.value[j] = ~gctl.value[j]; nctl.value[j] = ~gctl.value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
val.value.integer.value[j] = gctl.value[j]; val.value.integer.value[j] = gctl.value[j];
} }
nctl.min = gctl.min; nctl.min = gctl.min;
...@@ -1019,7 +1027,47 @@ static void snd_emu10k1_del_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *icod ...@@ -1019,7 +1027,47 @@ static void snd_emu10k1_del_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *icod
ctl = snd_emu10k1_look_for_ctl(emu, &id); ctl = snd_emu10k1_look_for_ctl(emu, &id);
snd_runtime_check(ctl == NULL, continue); snd_runtime_check(ctl == NULL, continue);
snd_ctl_remove(emu->card, ctl->kcontrol); snd_ctl_remove(emu->card, ctl->kcontrol);
list_del(&ctl->list);
}
}
static void snd_emu10k1_list_controls(emu10k1_t *emu, emu10k1_fx8010_code_t *icode)
{
int i = 0, j;
unsigned int total = 0;
emu10k1_fx8010_control_gpr_t *_gctl, gctl;
snd_emu10k1_fx8010_ctl_t *ctl;
snd_ctl_elem_id_t *id;
struct list_head *list;
_gctl = icode->gpr_list_controls;
list_for_each(list, &emu->fx8010.gpr_ctl) {
ctl = emu10k1_gpr_ctl(list);
total++;
if (i < icode->gpr_list_control_count) {
memset(&gctl, 0, sizeof(gctl));
id = &ctl->kcontrol->id;
gctl.id.iface = id->iface;
strncpy(gctl.id.name, id->name, sizeof(gctl.id.name));
gctl.id.index = id->index;
gctl.id.device = id->device;
gctl.id.subdevice = id->subdevice;
gctl.vcount = ctl->vcount;
gctl.count = ctl->count;
for (j = 0; j < 32; j++) {
gctl.gpr[j] = ctl->gpr[j];
gctl.value[j] = ctl->value[j];
}
gctl.min = ctl->min;
gctl.max = ctl->max;
gctl.translation = ctl->translation;
snd_runtime_check(copy_to_user(_gctl, &gctl, sizeof(gctl)) == 0, goto __next);
}
__next:
_gctl++;
i++;
} }
icode->gpr_list_control_total = total;
} }
static int snd_emu10k1_icode_poke(emu10k1_t *emu, emu10k1_fx8010_code_t *icode) static int snd_emu10k1_icode_poke(emu10k1_t *emu, emu10k1_fx8010_code_t *icode)
...@@ -1062,6 +1110,7 @@ static int snd_emu10k1_icode_peek(emu10k1_t *emu, emu10k1_fx8010_code_t *icode) ...@@ -1062,6 +1110,7 @@ static int snd_emu10k1_icode_peek(emu10k1_t *emu, emu10k1_fx8010_code_t *icode)
snd_emu10k1_gpr_peek(emu, icode); snd_emu10k1_gpr_peek(emu, icode);
snd_emu10k1_tram_peek(emu, icode); snd_emu10k1_tram_peek(emu, icode);
snd_emu10k1_code_peek(emu, icode); snd_emu10k1_code_peek(emu, icode);
snd_emu10k1_list_controls(emu, icode);
up(&emu->fx8010.lock); up(&emu->fx8010.lock);
return 0; return 0;
} }
......
#
# Makefile for ALSA
# Copyright (c) 2001 by Jaroslav Kysela <perex@suse.cz>
#
export-objs := ice1712.o
snd-ice1712-objs := ice1712.o ak4524.o delta.o hoontech.o ews.o
# Toplevel Module Dependency
obj-$(CONFIG_SND_ICE1712) += snd-ice1712.o
include $(TOPDIR)/Rules.make
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#ifndef __SOUND_DELTA_H
#define __SOUND_DELTA_H
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Lowlevel functions for M-Audio Delta 1010, 44, 66, Dio2496, Audiophile
*
* Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#define DELTA_DEVICE_DESC \
"{MidiMan M Audio,Delta 1010},"\
"{MidiMan M Audio,Delta DiO 2496},"\
"{MidiMan M Audio,Delta 66},"\
"{MidiMan M Audio,Delta 44},"\
"{MidiMan M Audio,Audiophile 24/96},"
#define ICE1712_SUBDEVICE_DELTA1010 0x121430d6
#define ICE1712_SUBDEVICE_DELTADIO2496 0x121431d6
#define ICE1712_SUBDEVICE_DELTA66 0x121432d6
#define ICE1712_SUBDEVICE_DELTA44 0x121433d6
#define ICE1712_SUBDEVICE_AUDIOPHILE 0x121434d6
#define ICE1712_SUBDEVICE_DELTA1010LT 0x12143bd6
/* entry point */
extern struct snd_ice1712_card_info snd_ice1712_delta_cards[];
/*
* MidiMan M-Audio Delta GPIO definitions
*/
/* MidiMan M-Audio Delta1010 */
#define ICE1712_DELTA_DFS 0x01 /* fast/slow sample rate mode */
/* (>48kHz must be 1) */
#define ICE1712_DELTA_SPDIF_IN_STAT 0x02
/* S/PDIF input status */
/* 0 = valid signal is present */
/* all except Delta44 */
/* look to CS8414 datasheet */
#define ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK 0x04
/* S/PDIF output status clock */
/* (writting on rising edge - 0->1) */
/* all except Delta44 */
/* look to CS8404A datasheet */
#define ICE1712_DELTA_SPDIF_OUT_STAT_DATA 0x08
/* S/PDIF output status data */
/* all except Delta44 */
/* look to CS8404A datasheet */
/* MidiMan M-Audio DeltaDiO */
/* 0x01 = DFS */
/* 0x02 = SPDIF_IN_STAT */
/* 0x04 = SPDIF_OUT_STAT_CLOCK */
/* 0x08 = SPDIF_OUT_STAT_DATA */
#define ICE1712_DELTA_SPDIF_INPUT_SELECT 0x10
/* coaxial (0), optical (1) */
/* S/PDIF input select*/
/* MidiMan M-Audio Delta1010 */
/* 0x01 = DFS */
/* 0x02 = SPDIF_IN_STAT */
/* 0x04 = SPDIF_OUT_STAT_CLOCK */
/* 0x08 = SPDIF_OUT_STAT_DATA */
#define ICE1712_DELTA_WORD_CLOCK_SELECT 0x10
/* 1 - clock are taken from S/PDIF input */
/* 0 - clock are taken from Word Clock input */
/* affected SPMCLKIN pin of Envy24 */
#define ICE1712_DELTA_WORD_CLOCK_STATUS 0x20
/* 0 = valid word clock signal is present */
/* MidiMan M-Audio Delta66 */
/* 0x01 = DFS */
/* 0x02 = SPDIF_IN_STAT */
/* 0x04 = SPDIF_OUT_STAT_CLOCK */
/* 0x08 = SPDIF_OUT_STAT_DATA */
#define ICE1712_DELTA_CODEC_SERIAL_DATA 0x10
/* AKM4524 serial data */
#define ICE1712_DELTA_CODEC_SERIAL_CLOCK 0x20
/* AKM4524 serial clock */
/* (writting on rising edge - 0->1 */
#define ICE1712_DELTA_CODEC_CHIP_A 0x40
#define ICE1712_DELTA_CODEC_CHIP_B 0x80
/* 1 - select chip A or B */
/* MidiMan M-Audio Delta44 */
/* 0x01 = DFS */
/* 0x10 = CODEC_SERIAL_DATA */
/* 0x20 = CODEC_SERIAL_CLOCK */
/* 0x40 = CODEC_CHIP_A */
/* 0x80 = CODEC_CHIP_B */
/* MidiMan M-Audio Audiophile definitions */
/* 0x01 = DFS */
#define ICE1712_DELTA_AP_CCLK 0x02 /* SPI clock */
/* (clocking on rising edge - 0->1) */
#define ICE1712_DELTA_AP_DIN 0x04 /* data input */
#define ICE1712_DELTA_AP_DOUT 0x08 /* data output */
#define ICE1712_DELTA_AP_CS_DIGITAL 0x10 /* CS8427 chip select */
/* low signal = select */
#define ICE1712_DELTA_AP_CS_CODEC 0x20 /* AK4528 chip select */
/* low signal = select */
#endif /* __SOUND_DELTA_H */
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#ifndef __SOUND_EWS_H
#define __SOUND_EWS_H
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Lowlevel functions for Terratec EWS88MT/D, EWX24/96, DMX 6Fire
*
* Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
* 2002 Takashi Iwai <tiwai@suse.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#define EWS_DEVICE_DESC \
"{TerraTec,EWX 24/96},"\
"{TerraTec,EWS 88MT},"\
"{TerraTec,EWS 88D},"\
"{TerraTec,DMX 6Fire},"
#define ICE1712_SUBDEVICE_EWX2496 0x3b153011
#define ICE1712_SUBDEVICE_EWS88MT 0x3b151511
#define ICE1712_SUBDEVICE_EWS88D 0x3b152b11
#define ICE1712_SUBDEVICE_DMX6FIRE 0x3b153811
/* entry point */
extern struct snd_ice1712_card_info snd_ice1712_ews_cards[];
/* TerraTec EWX 24/96 configuration definitions */
#define ICE1712_EWX2496_AK4524_CS 0x01 /* AK4524 chip select; low = active */
#define ICE1712_EWX2496_AIN_SEL 0x02 /* input sensitivity switch; high = louder */
#define ICE1712_EWX2496_AOUT_SEL 0x04 /* output sensitivity switch; high = louder */
#define ICE1712_EWX2496_RW 0x08 /* read/write switch for i2c; high = write */
#define ICE1712_EWX2496_SERIAL_DATA 0x10 /* i2c & ak4524 data */
#define ICE1712_EWX2496_SERIAL_CLOCK 0x20 /* i2c & ak4524 clock */
#define ICE1712_EWX2496_TX2 0x40 /* MIDI2 (not used) */
#define ICE1712_EWX2496_RX2 0x80 /* MIDI2 (not used) */
/* TerraTec EWS 88MT/D configuration definitions */
/* RW, SDA snd SCLK are identical with EWX24/96 */
#define ICE1712_EWS88_CS8414_RATE 0x07 /* CS8414 sample rate: gpio 0-2 */
#define ICE1712_EWS88_RW 0x08 /* read/write switch for i2c; high = write */
#define ICE1712_EWS88_SERIAL_DATA 0x10 /* i2c & ak4524 data */
#define ICE1712_EWS88_SERIAL_CLOCK 0x20 /* i2c & ak4524 clock */
#define ICE1712_EWS88_TX2 0x40 /* MIDI2 (only on 88D) */
#define ICE1712_EWS88_RX2 0x80 /* MIDI2 (only on 88D) */
/* i2c address */
#define ICE1712_EWS88MT_CS8404_ADDR (0x40>>1)
#define ICE1712_EWS88MT_INPUT_ADDR (0x46>>1)
#define ICE1712_EWS88MT_OUTPUT_ADDR (0x48>>1)
#define ICE1712_EWS88MT_OUTPUT_SENSE 0x40 /* mask */
#define ICE1712_EWS88D_PCF_ADDR (0x40>>1)
/* TerraTec DMX 6Fire configuration definitions */
#define ICE1712_6FIRE_AK4524_CS_MASK 0x07 /* AK4524 chip select #1-#3 */
#define ICE1712_6FIRE_RW 0x08 /* read/write switch for i2c; high = write */
#define ICE1712_6FIRE_SERIAL_DATA 0x10 /* i2c & ak4524 data */
#define ICE1712_6FIRE_SERIAL_CLOCK 0x20 /* i2c & ak4524 clock */
#define ICE1712_6FIRE_TX2 0x40 /* MIDI2 */
#define ICE1712_6FIRE_RX2 0x80 /* MIDI2 */
#define ICE1712_6FIRE_PCF9554_ADDR (0x40>>1)
#define ICE1712_6FIRE_CS8427_ADDR (0x22>>1)
#endif /* __SOUND_EWS_H */
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Lowlevel functions for Hoontech STDSP24
*
* Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <sound/driver.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include "ice1712.h"
#include "hoontech.h"
static void __devinit snd_ice1712_stdsp24_gpio_write(ice1712_t *ice, unsigned char byte)
{
byte |= ICE1712_STDSP24_CLOCK_BIT;
udelay(100);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
byte &= ~ICE1712_STDSP24_CLOCK_BIT;
udelay(100);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
byte |= ICE1712_STDSP24_CLOCK_BIT;
udelay(100);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
}
static void __devinit snd_ice1712_stdsp24_darear(ice1712_t *ice, int activate)
{
down(&ice->gpio_mutex);
ICE1712_STDSP24_0_DAREAR(ice->hoontech_boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[0]);
up(&ice->gpio_mutex);
}
static void __devinit snd_ice1712_stdsp24_mute(ice1712_t *ice, int activate)
{
down(&ice->gpio_mutex);
ICE1712_STDSP24_3_MUTE(ice->hoontech_boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[3]);
up(&ice->gpio_mutex);
}
static void __devinit snd_ice1712_stdsp24_insel(ice1712_t *ice, int activate)
{
down(&ice->gpio_mutex);
ICE1712_STDSP24_3_INSEL(ice->hoontech_boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[3]);
up(&ice->gpio_mutex);
}
static void __devinit snd_ice1712_stdsp24_box_channel(ice1712_t *ice, int box, int chn, int activate)
{
down(&ice->gpio_mutex);
/* select box */
ICE1712_STDSP24_0_BOX(ice->hoontech_boxbits, box);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[0]);
/* prepare for write */
if (chn == 3)
ICE1712_STDSP24_2_CHN4(ice->hoontech_boxbits, 0);
ICE1712_STDSP24_2_MIDI1(ice->hoontech_boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[2]);
ICE1712_STDSP24_1_CHN1(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_1_CHN2(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_1_CHN3(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_2_CHN4(ice->hoontech_boxbits, 1);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[1]);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[2]);
udelay(100);
if (chn == 3) {
ICE1712_STDSP24_2_CHN4(ice->hoontech_boxbits, 0);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[2]);
} else {
switch (chn) {
case 0: ICE1712_STDSP24_1_CHN1(ice->hoontech_boxbits, 0); break;
case 1: ICE1712_STDSP24_1_CHN2(ice->hoontech_boxbits, 0); break;
case 2: ICE1712_STDSP24_1_CHN3(ice->hoontech_boxbits, 0); break;
}
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[1]);
}
udelay(100);
ICE1712_STDSP24_1_CHN1(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_1_CHN2(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_1_CHN3(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_2_CHN4(ice->hoontech_boxbits, 1);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[1]);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[2]);
udelay(100);
ICE1712_STDSP24_2_MIDI1(ice->hoontech_boxbits, 0);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[2]);
up(&ice->gpio_mutex);
}
static void __devinit snd_ice1712_stdsp24_box_midi(ice1712_t *ice, int box, int master, int slave)
{
down(&ice->gpio_mutex);
/* select box */
ICE1712_STDSP24_0_BOX(ice->hoontech_boxbits, box);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[0]);
ICE1712_STDSP24_2_MIDIIN(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_2_MIDI1(ice->hoontech_boxbits, master);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[2]);
udelay(100);
ICE1712_STDSP24_2_MIDIIN(ice->hoontech_boxbits, 0);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[2]);
udelay(100);
ICE1712_STDSP24_2_MIDIIN(ice->hoontech_boxbits, 1);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[2]);
udelay(100);
/* MIDI2 is direct */
ICE1712_STDSP24_3_MIDI2(ice->hoontech_boxbits, slave);
snd_ice1712_stdsp24_gpio_write(ice, ice->hoontech_boxbits[3]);
up(&ice->gpio_mutex);
}
static int __devinit snd_ice1712_hoontech_init(ice1712_t *ice)
{
int box, chn;
ice->num_total_dacs = 8;
ice->hoontech_boxbits[0] =
ice->hoontech_boxbits[1] =
ice->hoontech_boxbits[2] =
ice->hoontech_boxbits[3] = 0; /* should be already */
ICE1712_STDSP24_SET_ADDR(ice->hoontech_boxbits, 0);
ICE1712_STDSP24_CLOCK(ice->hoontech_boxbits, 0, 1);
ICE1712_STDSP24_0_BOX(ice->hoontech_boxbits, 0);
ICE1712_STDSP24_0_DAREAR(ice->hoontech_boxbits, 0);
ICE1712_STDSP24_SET_ADDR(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_CLOCK(ice->hoontech_boxbits, 1, 1);
ICE1712_STDSP24_1_CHN1(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_1_CHN2(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_1_CHN3(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_SET_ADDR(ice->hoontech_boxbits, 2);
ICE1712_STDSP24_CLOCK(ice->hoontech_boxbits, 2, 1);
ICE1712_STDSP24_2_CHN4(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_2_MIDIIN(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_2_MIDI1(ice->hoontech_boxbits, 0);
ICE1712_STDSP24_SET_ADDR(ice->hoontech_boxbits, 3);
ICE1712_STDSP24_CLOCK(ice->hoontech_boxbits, 3, 1);
ICE1712_STDSP24_3_MIDI2(ice->hoontech_boxbits, 0);
ICE1712_STDSP24_3_MUTE(ice->hoontech_boxbits, 1);
ICE1712_STDSP24_3_INSEL(ice->hoontech_boxbits, 0);
/* let's go - activate only functions in first box */
ice->hoontech_config = 0;
/* ICE1712_STDSP24_MUTE |
ICE1712_STDSP24_INSEL |
ICE1712_STDSP24_DAREAR; */
ice->hoontech_boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 |
ICE1712_STDSP24_BOX_CHN2 |
ICE1712_STDSP24_BOX_CHN3 |
ICE1712_STDSP24_BOX_CHN4 |
ICE1712_STDSP24_BOX_MIDI1 |
ICE1712_STDSP24_BOX_MIDI2;
ice->hoontech_boxconfig[1] =
ice->hoontech_boxconfig[2] =
ice->hoontech_boxconfig[3] = 0;
snd_ice1712_stdsp24_darear(ice, (ice->hoontech_config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
snd_ice1712_stdsp24_mute(ice, (ice->hoontech_config & ICE1712_STDSP24_MUTE) ? 1 : 0);
snd_ice1712_stdsp24_insel(ice, (ice->hoontech_config & ICE1712_STDSP24_INSEL) ? 1 : 0);
for (box = 0; box < 4; box++) {
for (chn = 0; chn < 4; chn++)
snd_ice1712_stdsp24_box_channel(ice, box, chn, (ice->hoontech_boxconfig[box] & (1 << chn)) ? 1 : 0);
snd_ice1712_stdsp24_box_midi(ice, box,
(ice->hoontech_boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1) ? 1 : 0,
(ice->hoontech_boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2) ? 1 : 0);
}
return 0;
}
/* entry point */
struct snd_ice1712_card_info snd_ice1712_hoontech_cards[] __devinitdata = {
{
ICE1712_SUBDEVICE_STDSP24,
"Hoontech SoundTrack Audio DSP24",
snd_ice1712_hoontech_init,
},
{ } /* terminator */
};
#ifndef __SOUND_HOONTECH_H
#define __SOUND_HOONTECH_H
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Lowlevel functions for Hoontech STDSP24
*
* Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#define HOONTECH_DEVICE_DESC "{Hoontech SoundTrack DSP 24},"
#define ICE1712_SUBDEVICE_STDSP24 0x12141217 /* Hoontech SoundTrack Audio DSP 24 */
extern struct snd_ice1712_card_info snd_ice1712_hoontech_cards[];
/* Hoontech SoundTrack Audio DSP 24 GPIO definitions */
#define ICE1712_STDSP24_0_BOX(r, x) r[0] = ((r[0] & ~3) | ((x)&3))
#define ICE1712_STDSP24_0_DAREAR(r, x) r[0] = ((r[0] & ~4) | (((x)&1)<<2))
#define ICE1712_STDSP24_1_CHN1(r, x) r[1] = ((r[1] & ~1) | ((x)&1))
#define ICE1712_STDSP24_1_CHN2(r, x) r[1] = ((r[1] & ~2) | (((x)&1)<<1))
#define ICE1712_STDSP24_1_CHN3(r, x) r[1] = ((r[1] & ~4) | (((x)&1)<<2))
#define ICE1712_STDSP24_2_CHN4(r, x) r[2] = ((r[2] & ~1) | ((x)&1))
#define ICE1712_STDSP24_2_MIDIIN(r, x) r[2] = ((r[2] & ~2) | (((x)&1)<<1))
#define ICE1712_STDSP24_2_MIDI1(r, x) r[2] = ((r[2] & ~4) | (((x)&1)<<2))
#define ICE1712_STDSP24_3_MIDI2(r, x) r[3] = ((r[3] & ~1) | ((x)&1))
#define ICE1712_STDSP24_3_MUTE(r, x) r[3] = ((r[3] & ~2) | (((x)&1)<<1))
#define ICE1712_STDSP24_3_INSEL(r, x) r[3] = ((r[3] & ~4) | (((x)&1)<<2))
#define ICE1712_STDSP24_SET_ADDR(r, a) r[a&3] = ((r[a&3] & ~0x18) | (((a)&3)<<3))
#define ICE1712_STDSP24_CLOCK(r, a, c) r[a&3] = ((r[a&3] & ~0x20) | (((c)&1)<<5))
#define ICE1712_STDSP24_CLOCK_BIT (1<<5)
/* Hoontech SoundTrack Audio DSP 24 box configuration definitions */
#define ICE1712_STDSP24_DAREAR (1<<0)
#define ICE1712_STDSP24_MUTE (1<<1)
#define ICE1712_STDSP24_INSEL (1<<2)
#define ICE1712_STDSP24_BOX_CHN1 (1<<0) /* input channel 1 */
#define ICE1712_STDSP24_BOX_CHN2 (1<<1) /* input channel 2 */
#define ICE1712_STDSP24_BOX_CHN3 (1<<2) /* input channel 3 */
#define ICE1712_STDSP24_BOX_CHN4 (1<<3) /* input channel 4 */
#define ICE1712_STDSP24_BOX_MIDI1 (1<<8)
#define ICE1712_STDSP24_BOX_MIDI2 (1<<9)
#endif /* __SOUND_HOONTECH_H */
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