Commit cea72048 authored by Deepak Saxena's avatar Deepak Saxena

entry-armv.S, debug.S, bios32.c:

  IXP4xx support
parent f338b93f
...@@ -155,6 +155,30 @@ static void __devinit pci_fixup_dec21285(struct pci_dev *dev) ...@@ -155,6 +155,30 @@ static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
} }
} }
/*
* Same as above. The PrPMC800 carrier board for the PrPMC1100
* card maps the host-bridge @ 00:01:00 for some reason and it
* ends up getting scanned. Note that we only want to do this
* fixup when we find the IXP4xx on a PrPMC system, which is why
* we check the machine type. We could be running on a board
* with an IXP4xx target device and we don't want to kill the
* resources in that case.
*/
static void __devinit pci_fixup_prpmc1100(struct pci_dev *dev)
{
int i;
if (machine_is_prpmc1100()) {
dev->class &= 0xff;
dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
dev->resource[i].start = 0;
dev->resource[i].end = 0;
dev->resource[i].flags = 0;
}
}
}
/* /*
* PCI IDE controllers use non-standard I/O port decoding, respect it. * PCI IDE controllers use non-standard I/O port decoding, respect it.
*/ */
...@@ -273,6 +297,10 @@ struct pci_fixup pcibios_fixups[] = { ...@@ -273,6 +297,10 @@ struct pci_fixup pcibios_fixups[] = {
PCI_FIXUP_HEADER, PCI_FIXUP_HEADER,
PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
pci_fixup_ide_bases pci_fixup_ide_bases
}, {
PCI_FIXUP_HEADER,
PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX,
pci_fixup_prpmc1100
}, { 0 } }, { 0 }
}; };
......
...@@ -465,6 +465,31 @@ ...@@ -465,6 +465,31 @@
beq 1001b beq 1001b
.endm .endm
#elif defined(CONFIG_ARCH_IXP4XX)
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0xc8000000
movne \rx, #0xff000000
add \rx,\rx,#3 @ Uart regs are at off set of 3 if
@ byte writes used - Big Endian.
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
.endm
.macro waituart,rd,rx
1002: ldrb \rd, [\rx, #0x14]
and \rd, \rd, #0x60 @ check THRE and TEMT bits
teq \rd, #0x60
bne 1002b
.endm
.macro busyuart,rd,rx
.endm
#elif defined(CONFIG_ARCH_OMAP) #elif defined(CONFIG_ARCH_OMAP)
#include <asm/arch/serial.h> #include <asm/arch/serial.h>
......
...@@ -639,6 +639,34 @@ ENTRY(soft_irq_mask) ...@@ -639,6 +639,34 @@ ENTRY(soft_irq_mask)
.macro irq_prio_table .macro irq_prio_table
.endm .endm
#elif defined (CONFIG_ARCH_IXP4XX)
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
ldr \irqstat, [\irqstat] @ get interrupts
cmp \irqstat, #0
beq 1002f
clz \irqnr, \irqstat
mov \base, #31
subs \irqnr, \base, \irqnr
/*
1001: tst \irqstat, #1
addeq \irqnr, \irqnr, #1
moveq \irqstat, \irqstat, lsr #1
tsteq \irqnr, #32
beq 1001b
teq \irqnr, #32
*/
1002:
.endm
.macro irq_prio_table
.endm
#elif defined(CONFIG_ARCH_OMAP) #elif defined(CONFIG_ARCH_OMAP)
.macro disable_fiq .macro disable_fiq
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment