Commit cee0534a authored by Douglas Anderson's avatar Douglas Anderson Committed by Heiko Stuebner

ARM: dts: rockchip: Add cpu id to rk3288 efuse node

This just adds in another field of what's stored in the e-fuse on
rk3288.  Though I can't personally promise that every rk3288 out there
has the CPU ID stored in the eFuse at this location, there is some
evidence that it is correct:
- This matches what was in the Chrome OS 3.14 branch (see
  EFUSE_CHIP_UID_OFFSET and EFUSE_CHIP_UID_LEN) for rk3288.
- The upstream rk3399 dts file has this same data at the same offset
  and with the same length, indiciating that this is likely common for
  several modern Rockchip SoCs.
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20190919142611.1.I309434f00a2a9be71e4437991fe08abc12f06e2e@changeidSigned-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 54ecb8f7
......@@ -1391,6 +1391,9 @@ efuse: efuse@ffb40000 {
clocks = <&cru PCLK_EFUSE256>;
clock-names = "pclk_efuse";
cpu_id: cpu-id@7 {
reg = <0x07 0x10>;
};
cpu_leakage: cpu_leakage@17 {
reg = <0x17 0x1>;
};
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment