Commit cfb11671 authored by Hongzhou Yang's avatar Hongzhou Yang Committed by Matthias Brugger

ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135.

Add pinctrl,GPIO and EINT node to mt8135.dtsi.
Signed-off-by: default avatarHongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent b787f68c
This diff is collapsed.
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton64.dtsi" #include "skeleton64.dtsi"
#include "mt8135-pinfunc.h"
/ { / {
compatible = "mediatek,mt8135"; compatible = "mediatek,mt8135";
...@@ -101,6 +102,29 @@ soc { ...@@ -101,6 +102,29 @@ soc {
compatible = "simple-bus"; compatible = "simple-bus";
ranges; ranges;
/*
* Pinctrl access register at 0x10005000 and 0x1020c000 through
* regmap. Register 0x1000b000 is used by EINT.
*/
pio: pinctrl@10005000 {
compatible = "mediatek,mt8135-pinctrl";
reg = <0 0x1000b000 0 0x1000>;
mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>;
pins-are-numbered;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
};
syscfg_pctl_a: syscfg_pctl_a@10005000 {
compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";
reg = <0 0x10005000 0 0x1000>;
};
timer: timer@10008000 { timer: timer@10008000 {
compatible = "mediatek,mt8135-timer", compatible = "mediatek,mt8135-timer",
"mediatek,mt6577-timer"; "mediatek,mt6577-timer";
...@@ -119,6 +143,11 @@ sysirq: interrupt-controller@10200030 { ...@@ -119,6 +143,11 @@ sysirq: interrupt-controller@10200030 {
reg = <0 0x10200030 0 0x1c>; reg = <0 0x10200030 0 0x1c>;
}; };
syscfg_pctl_b: syscfg_pctl_b@1020c000 {
compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";
reg = <0 0x1020c000 0 0x1000>;
};
gic: interrupt-controller@10211000 { gic: interrupt-controller@10211000 {
compatible = "arm,cortex-a15-gic"; compatible = "arm,cortex-a15-gic";
interrupt-controller; interrupt-controller;
......
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