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Commit d0659d32 authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/mmu: directly use instmem for page tables 

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent d8e83994
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Inline Side-by-side
Showing with 75 additions and 76 deletions
drivers/gpu/drm/nouveau/include/nvkm/core/gpuobj.h
View file @ d0659d32
...@@ -53,7 +53,7 @@ void nvkm_gpuobj_destroy(struct nvkm_gpuobj *); ...@@ -53,7 +53,7 @@ void nvkm_gpuobj_destroy(struct nvkm_gpuobj *);
int nvkm_gpuobj_new(struct nvkm_object *, struct nvkm_object *, u32 size, int nvkm_gpuobj_new(struct nvkm_object *, struct nvkm_object *, u32 size,
u32 align, u32 flags, struct nvkm_gpuobj **); u32 align, u32 flags, struct nvkm_gpuobj **);
int nvkm_gpuobj_dup(struct nvkm_object *, struct nvkm_gpuobj *, int nvkm_gpuobj_dup(struct nvkm_object *, struct nvkm_memory *,
struct nvkm_gpuobj **); struct nvkm_gpuobj **);
int nvkm_gpuobj_map(struct nvkm_gpuobj *, u32 acc, struct nvkm_vma *); int nvkm_gpuobj_map(struct nvkm_gpuobj *, u32 acc, struct nvkm_vma *);
int nvkm_gpuobj_map_vm(struct nvkm_gpuobj *, struct nvkm_vm *, u32 access, int nvkm_gpuobj_map_vm(struct nvkm_gpuobj *, struct nvkm_vm *, u32 access,
......
drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h
View file @ d0659d32
...@@ -6,7 +6,7 @@ struct nvkm_device; ...@@ -6,7 +6,7 @@ struct nvkm_device;
struct nvkm_mem; struct nvkm_mem;
struct nvkm_vm_pgt { struct nvkm_vm_pgt {
struct nvkm_gpuobj *obj[2]; struct nvkm_memory *mem[2];
u32 refcount[2]; u32 refcount[2];
}; };
...@@ -53,13 +53,14 @@ struct nvkm_mmu { ...@@ -53,13 +53,14 @@ struct nvkm_mmu {
struct nvkm_vm **); struct nvkm_vm **);
void (*map_pgt)(struct nvkm_gpuobj *pgd, u32 pde, void (*map_pgt)(struct nvkm_gpuobj *pgd, u32 pde,
struct nvkm_gpuobj *pgt[2]); struct nvkm_memory *pgt[2]);
void (*map)(struct nvkm_vma *, struct nvkm_gpuobj *, void (*map)(struct nvkm_vma *, struct nvkm_memory *,
struct nvkm_mem *, u32 pte, u32 cnt, struct nvkm_mem *, u32 pte, u32 cnt,
u64 phys, u64 delta); u64 phys, u64 delta);
void (*map_sg)(struct nvkm_vma *, struct nvkm_gpuobj *, void (*map_sg)(struct nvkm_vma *, struct nvkm_memory *,
struct nvkm_mem *, u32 pte, u32 cnt, dma_addr_t *); struct nvkm_mem *, u32 pte, u32 cnt, dma_addr_t *);
void (*unmap)(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt); void (*unmap)(struct nvkm_vma *, struct nvkm_memory *pgt,
u32 pte, u32 cnt);
void (*flush)(struct nvkm_vm *); void (*flush)(struct nvkm_vm *);
}; };
......
drivers/gpu/drm/nouveau/nvkm/core/gpuobj.c
View file @ d0659d32
...@@ -308,7 +308,6 @@ static void ...@@ -308,7 +308,6 @@ static void
nvkm_gpudup_dtor(struct nvkm_object *object) nvkm_gpudup_dtor(struct nvkm_object *object)
{ {
struct nvkm_gpuobj *gpuobj = (void *)object; struct nvkm_gpuobj *gpuobj = (void *)object;
nvkm_object_ref(NULL, (struct nvkm_object **)&gpuobj->parent);
nvkm_object_destroy(&gpuobj->object); nvkm_object_destroy(&gpuobj->object);
} }
...@@ -323,7 +322,7 @@ nvkm_gpudup_oclass = { ...@@ -323,7 +322,7 @@ nvkm_gpudup_oclass = {
}; };
int int
nvkm_gpuobj_dup(struct nvkm_object *parent, struct nvkm_gpuobj *base, nvkm_gpuobj_dup(struct nvkm_object *parent, struct nvkm_memory *base,
struct nvkm_gpuobj **pgpuobj) struct nvkm_gpuobj **pgpuobj)
{ {
struct nvkm_gpuobj *gpuobj; struct nvkm_gpuobj *gpuobj;
...@@ -335,8 +334,7 @@ nvkm_gpuobj_dup(struct nvkm_object *parent, struct nvkm_gpuobj *base, ...@@ -335,8 +334,7 @@ nvkm_gpuobj_dup(struct nvkm_object *parent, struct nvkm_gpuobj *base,
if (ret) if (ret)
return ret; return ret;
nvkm_object_ref(nv_object(base), (struct nvkm_object **)&gpuobj->parent); gpuobj->addr = nvkm_memory_addr(base);
gpuobj->addr = base->addr; gpuobj->size = nvkm_memory_size(base);
gpuobj->size = base->size;
return 0; return 0;
} }
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c
View file @ d0659d32
...@@ -61,7 +61,7 @@ nv04_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_object *parent, ...@@ -61,7 +61,7 @@ nv04_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_object *parent,
if (dmaobj->clone) { if (dmaobj->clone) {
struct nv04_mmu *mmu = nv04_mmu(dmaobj); struct nv04_mmu *mmu = nv04_mmu(dmaobj);
struct nvkm_gpuobj *pgt = mmu->vm->pgt[0].obj[0]; struct nvkm_memory *pgt = mmu->vm->pgt[0].mem[0];
if (!dmaobj->base.start) if (!dmaobj->base.start)
return nvkm_gpuobj_dup(parent, pgt, pgpuobj); return nvkm_gpuobj_dup(parent, pgt, pgpuobj);
nvkm_kmap(pgt); nvkm_kmap(pgt);
......
drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c
View file @ d0659d32
...@@ -161,7 +161,7 @@ gf100_bar_dtor(struct nvkm_object *object) ...@@ -161,7 +161,7 @@ gf100_bar_dtor(struct nvkm_object *object)
nvkm_gpuobj_ref(NULL, &bar->bar[1].mem); nvkm_gpuobj_ref(NULL, &bar->bar[1].mem);
if (bar->bar[0].vm) { if (bar->bar[0].vm) {
nvkm_gpuobj_ref(NULL, &bar->bar[0].vm->pgt[0].obj[0]); nvkm_memory_del(&bar->bar[0].vm->pgt[0].mem[0]);
nvkm_vm_ref(NULL, &bar->bar[0].vm, bar->bar[0].pgd); nvkm_vm_ref(NULL, &bar->bar[0].vm, bar->bar[0].pgd);
} }
nvkm_gpuobj_ref(NULL, &bar->bar[0].pgd); nvkm_gpuobj_ref(NULL, &bar->bar[0].pgd);
......
drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
View file @ d0659d32
...@@ -207,7 +207,7 @@ nv50_bar_dtor(struct nvkm_object *object) ...@@ -207,7 +207,7 @@ nv50_bar_dtor(struct nvkm_object *object)
nvkm_vm_ref(NULL, &bar->bar1_vm, bar->pgd); nvkm_vm_ref(NULL, &bar->bar1_vm, bar->pgd);
nvkm_gpuobj_ref(NULL, &bar->bar3); nvkm_gpuobj_ref(NULL, &bar->bar3);
if (bar->bar3_vm) { if (bar->bar3_vm) {
nvkm_gpuobj_ref(NULL, &bar->bar3_vm->pgt[0].obj[0]); nvkm_memory_del(&bar->bar3_vm->pgt[0].mem[0]);
nvkm_vm_ref(NULL, &bar->bar3_vm, bar->pgd); nvkm_vm_ref(NULL, &bar->bar3_vm, bar->pgd);
} }
nvkm_gpuobj_ref(NULL, &bar->pgd); nvkm_gpuobj_ref(NULL, &bar->pgd);
......
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c
View file @ d0659d32
...@@ -46,7 +46,7 @@ nvkm_vm_map_at(struct nvkm_vma *vma, u64 delta, struct nvkm_mem *node) ...@@ -46,7 +46,7 @@ nvkm_vm_map_at(struct nvkm_vma *vma, u64 delta, struct nvkm_mem *node)
u32 num = r->length >> bits; u32 num = r->length >> bits;
while (num) { while (num) {
struct nvkm_gpuobj *pgt = vm->pgt[pde].obj[big]; struct nvkm_memory *pgt = vm->pgt[pde].mem[big];
end = (pte + num); end = (pte + num);
if (unlikely(end >= max)) if (unlikely(end >= max))
...@@ -89,7 +89,7 @@ nvkm_vm_map_sg_table(struct nvkm_vma *vma, u64 delta, u64 length, ...@@ -89,7 +89,7 @@ nvkm_vm_map_sg_table(struct nvkm_vma *vma, u64 delta, u64 length,
struct scatterlist *sg; struct scatterlist *sg;
for_each_sg(mem->sg->sgl, sg, mem->sg->nents, i) { for_each_sg(mem->sg->sgl, sg, mem->sg->nents, i) {
struct nvkm_gpuobj *pgt = vm->pgt[pde].obj[big]; struct nvkm_memory *pgt = vm->pgt[pde].mem[big];
sglen = sg_dma_len(sg) >> PAGE_SHIFT; sglen = sg_dma_len(sg) >> PAGE_SHIFT;
end = pte + sglen; end = pte + sglen;
...@@ -145,7 +145,7 @@ nvkm_vm_map_sg(struct nvkm_vma *vma, u64 delta, u64 length, ...@@ -145,7 +145,7 @@ nvkm_vm_map_sg(struct nvkm_vma *vma, u64 delta, u64 length,
u32 end, len; u32 end, len;
while (num) { while (num) {
struct nvkm_gpuobj *pgt = vm->pgt[pde].obj[big]; struct nvkm_memory *pgt = vm->pgt[pde].mem[big];
end = (pte + num); end = (pte + num);
if (unlikely(end >= max)) if (unlikely(end >= max))
...@@ -193,14 +193,14 @@ nvkm_vm_unmap_at(struct nvkm_vma *vma, u64 delta, u64 length) ...@@ -193,14 +193,14 @@ nvkm_vm_unmap_at(struct nvkm_vma *vma, u64 delta, u64 length)
u32 end, len; u32 end, len;
while (num) { while (num) {
struct nvkm_gpuobj *pgt = vm->pgt[pde].obj[big]; struct nvkm_memory *pgt = vm->pgt[pde].mem[big];
end = (pte + num); end = (pte + num);
if (unlikely(end >= max)) if (unlikely(end >= max))
end = max; end = max;
len = end - pte; len = end - pte;
mmu->unmap(pgt, pte, len); mmu->unmap(vma, pgt, pte, len);
num -= len; num -= len;
pte += len; pte += len;
...@@ -225,7 +225,7 @@ nvkm_vm_unmap_pgt(struct nvkm_vm *vm, int big, u32 fpde, u32 lpde) ...@@ -225,7 +225,7 @@ nvkm_vm_unmap_pgt(struct nvkm_vm *vm, int big, u32 fpde, u32 lpde)
struct nvkm_mmu *mmu = vm->mmu; struct nvkm_mmu *mmu = vm->mmu;
struct nvkm_vm_pgd *vpgd; struct nvkm_vm_pgd *vpgd;
struct nvkm_vm_pgt *vpgt; struct nvkm_vm_pgt *vpgt;
struct nvkm_gpuobj *pgt; struct nvkm_memory *pgt;
u32 pde; u32 pde;
for (pde = fpde; pde <= lpde; pde++) { for (pde = fpde; pde <= lpde; pde++) {
...@@ -233,14 +233,14 @@ nvkm_vm_unmap_pgt(struct nvkm_vm *vm, int big, u32 fpde, u32 lpde) ...@@ -233,14 +233,14 @@ nvkm_vm_unmap_pgt(struct nvkm_vm *vm, int big, u32 fpde, u32 lpde)
if (--vpgt->refcount[big]) if (--vpgt->refcount[big])
continue; continue;
pgt = vpgt->obj[big]; pgt = vpgt->mem[big];
vpgt->obj[big] = NULL; vpgt->mem[big] = NULL;
list_for_each_entry(vpgd, &vm->pgd_list, head) { list_for_each_entry(vpgd, &vm->pgd_list, head) {
mmu->map_pgt(vpgd->obj, pde, vpgt->obj); mmu->map_pgt(vpgd->obj, pde, vpgt->mem);
} }
nvkm_gpuobj_ref(NULL, &pgt); nvkm_memory_del(&pgt);
} }
} }
...@@ -257,13 +257,13 @@ nvkm_vm_map_pgt(struct nvkm_vm *vm, u32 pde, u32 type) ...@@ -257,13 +257,13 @@ nvkm_vm_map_pgt(struct nvkm_vm *vm, u32 pde, u32 type)
pgt_size = (1 << (mmu->pgt_bits + 12)) >> type; pgt_size = (1 << (mmu->pgt_bits + 12)) >> type;
pgt_size *= 8; pgt_size *= 8;
ret = nvkm_gpuobj_new(nv_object(vm->mmu), NULL, pgt_size, 0x1000, ret = nvkm_memory_new(mmu->subdev.device, NVKM_MEM_TARGET_INST,
NVOBJ_FLAG_ZERO_ALLOC, &vpgt->obj[big]); pgt_size, 0x1000, true, &vpgt->mem[big]);
if (unlikely(ret)) if (unlikely(ret))
return ret; return ret;
list_for_each_entry(vpgd, &vm->pgd_list, head) { list_for_each_entry(vpgd, &vm->pgd_list, head) {
mmu->map_pgt(vpgd->obj, pde, vpgt->obj); mmu->map_pgt(vpgd->obj, pde, vpgt->mem);
} }
vpgt->refcount[big]++; vpgt->refcount[big]++;
...@@ -342,16 +342,15 @@ int ...@@ -342,16 +342,15 @@ int
nvkm_vm_boot(struct nvkm_vm *vm, u64 size) nvkm_vm_boot(struct nvkm_vm *vm, u64 size)
{ {
struct nvkm_mmu *mmu = vm->mmu; struct nvkm_mmu *mmu = vm->mmu;
struct nvkm_gpuobj *pgt; struct nvkm_memory *pgt;
int ret; int ret;
ret = nvkm_gpuobj_new(nv_object(mmu), NULL, ret = nvkm_memory_new(mmu->subdev.device, NVKM_MEM_TARGET_INST,
(size >> mmu->spg_shift) * 8, 0x1000, (size >> mmu->spg_shift) * 8, 0x1000, true, &pgt);
NVOBJ_FLAG_ZERO_ALLOC, &pgt);
if (ret == 0) { if (ret == 0) {
vm->pgt[0].refcount[0] = 1; vm->pgt[0].refcount[0] = 1;
vm->pgt[0].obj[0] = pgt; vm->pgt[0].mem[0] = pgt;
nvkm_memory_boot(pgt->memory, vm); nvkm_memory_boot(pgt, vm);
} }
return ret; return ret;
...@@ -422,7 +421,7 @@ nvkm_vm_link(struct nvkm_vm *vm, struct nvkm_gpuobj *pgd) ...@@ -422,7 +421,7 @@ nvkm_vm_link(struct nvkm_vm *vm, struct nvkm_gpuobj *pgd)
mutex_lock(&vm->mutex); mutex_lock(&vm->mutex);
for (i = vm->fpde; i <= vm->lpde; i++) for (i = vm->fpde; i <= vm->lpde; i++)
mmu->map_pgt(pgd, i, vm->pgt[i - vm->fpde].obj); mmu->map_pgt(pgd, i, vm->pgt[i - vm->fpde].mem);
list_add(&vpgd->head, &vm->pgd_list); list_add(&vpgd->head, &vm->pgd_list);
mutex_unlock(&vm->mutex); mutex_unlock(&vm->mutex);
return 0; return 0;
......
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c
View file @ d0659d32
...@@ -69,14 +69,14 @@ const u8 gf100_pte_storage_type_map[256] = ...@@ -69,14 +69,14 @@ const u8 gf100_pte_storage_type_map[256] =
static void static void
gf100_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 index, struct nvkm_gpuobj *pgt[2]) gf100_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 index, struct nvkm_memory *pgt[2])
{ {
u32 pde[2] = { 0, 0 }; u32 pde[2] = { 0, 0 };
if (pgt[0]) if (pgt[0])
pde[1] = 0x00000001 | (pgt[0]->addr >> 8); pde[1] = 0x00000001 | (nvkm_memory_addr(pgt[0]) >> 8);
if (pgt[1]) if (pgt[1])
pde[0] = 0x00000001 | (pgt[1]->addr >> 8); pde[0] = 0x00000001 | (nvkm_memory_addr(pgt[1]) >> 8);
nvkm_kmap(pgd); nvkm_kmap(pgd);
nvkm_wo32(pgd, (index * 8) + 0, pde[0]); nvkm_wo32(pgd, (index * 8) + 0, pde[0]);
...@@ -99,7 +99,7 @@ gf100_vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target) ...@@ -99,7 +99,7 @@ gf100_vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target)
} }
static void static void
gf100_vm_map(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, gf100_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt,
struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta) struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
{ {
u64 next = 1 << (vma->node->type - 8); u64 next = 1 << (vma->node->type - 8);
...@@ -126,7 +126,7 @@ gf100_vm_map(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, ...@@ -126,7 +126,7 @@ gf100_vm_map(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt,
} }
static void static void
gf100_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, gf100_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
{ {
u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 7 : 5; u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 7 : 5;
...@@ -145,7 +145,7 @@ gf100_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, ...@@ -145,7 +145,7 @@ gf100_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt,
} }
static void static void
gf100_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt) gf100_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
{ {
nvkm_kmap(pgt); nvkm_kmap(pgt);
pte <<= 3; pte <<= 3;
......
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv04.c
View file @ d0659d32
...@@ -33,7 +33,7 @@ ...@@ -33,7 +33,7 @@
******************************************************************************/ ******************************************************************************/
static void static void
nv04_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, nv04_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
{ {
pte = 0x00008 + (pte * 4); pte = 0x00008 + (pte * 4);
...@@ -52,7 +52,7 @@ nv04_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, ...@@ -52,7 +52,7 @@ nv04_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt,
} }
static void static void
nv04_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt) nv04_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
{ {
pte = 0x00008 + (pte * 4); pte = 0x00008 + (pte * 4);
nvkm_kmap(pgt); nvkm_kmap(pgt);
...@@ -88,8 +88,9 @@ nv04_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine, ...@@ -88,8 +88,9 @@ nv04_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject) struct nvkm_object **pobject)
{ {
struct nvkm_device *device = (void *)parent;
struct nv04_mmu *mmu; struct nv04_mmu *mmu;
struct nvkm_gpuobj *dma; struct nvkm_memory *dma;
int ret; int ret;
ret = nvkm_mmu_create(parent, engine, oclass, "PCIGART", ret = nvkm_mmu_create(parent, engine, oclass, "PCIGART",
...@@ -113,11 +114,10 @@ nv04_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine, ...@@ -113,11 +114,10 @@ nv04_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
if (ret) if (ret)
return ret; return ret;
ret = nvkm_gpuobj_new(nv_object(mmu), NULL, ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST,
(NV04_PDMA_SIZE / NV04_PDMA_PAGE) * 4 + 8, (NV04_PDMA_SIZE / NV04_PDMA_PAGE) * 4 + 8,
16, NVOBJ_FLAG_ZERO_ALLOC, 16, true, &dma);
&mmu->vm->pgt[0].obj[0]); mmu->vm->pgt[0].mem[0] = dma;
dma = mmu->vm->pgt[0].obj[0];
mmu->vm->pgt[0].refcount[0] = 1; mmu->vm->pgt[0].refcount[0] = 1;
if (ret) if (ret)
return ret; return ret;
...@@ -134,7 +134,7 @@ nv04_mmu_dtor(struct nvkm_object *object) ...@@ -134,7 +134,7 @@ nv04_mmu_dtor(struct nvkm_object *object)
{ {
struct nv04_mmu *mmu = (void *)object; struct nv04_mmu *mmu = (void *)object;
if (mmu->vm) { if (mmu->vm) {
nvkm_gpuobj_ref(NULL, &mmu->vm->pgt[0].obj[0]); nvkm_memory_del(&mmu->vm->pgt[0].mem[0]);
nvkm_vm_ref(NULL, &mmu->vm, NULL); nvkm_vm_ref(NULL, &mmu->vm, NULL);
} }
if (mmu->nullp) { if (mmu->nullp) {
......
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv41.c
View file @ d0659d32
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
******************************************************************************/ ******************************************************************************/
static void static void
nv41_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, nv41_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
{ {
pte = pte * 4; pte = pte * 4;
...@@ -54,7 +54,7 @@ nv41_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, ...@@ -54,7 +54,7 @@ nv41_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt,
} }
static void static void
nv41_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt) nv41_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
{ {
pte = pte * 4; pte = pte * 4;
nvkm_kmap(pgt); nvkm_kmap(pgt);
...@@ -68,7 +68,7 @@ nv41_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt) ...@@ -68,7 +68,7 @@ nv41_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt)
static void static void
nv41_vm_flush(struct nvkm_vm *vm) nv41_vm_flush(struct nvkm_vm *vm)
{ {
struct nv04_mmu *mmu = (void *)vm->mmu; struct nv04_mmu *mmu = nv04_mmu(vm->mmu);
struct nvkm_device *device = mmu->base.subdev.device; struct nvkm_device *device = mmu->base.subdev.device;
mutex_lock(&nv_subdev(mmu)->mutex); mutex_lock(&nv_subdev(mmu)->mutex);
...@@ -121,10 +121,9 @@ nv41_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine, ...@@ -121,10 +121,9 @@ nv41_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
if (ret) if (ret)
return ret; return ret;
ret = nvkm_gpuobj_new(nv_object(mmu), NULL, ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST,
(NV41_GART_SIZE / NV41_GART_PAGE) * 4, 16, (NV41_GART_SIZE / NV41_GART_PAGE) * 4, 16, true,
NVOBJ_FLAG_ZERO_ALLOC, &mmu->vm->pgt[0].mem[0]);
&mmu->vm->pgt[0].obj[0]);
mmu->vm->pgt[0].refcount[0] = 1; mmu->vm->pgt[0].refcount[0] = 1;
if (ret) if (ret)
return ret; return ret;
...@@ -137,14 +136,14 @@ nv41_mmu_init(struct nvkm_object *object) ...@@ -137,14 +136,14 @@ nv41_mmu_init(struct nvkm_object *object)
{ {
struct nv04_mmu *mmu = (void *)object; struct nv04_mmu *mmu = (void *)object;
struct nvkm_device *device = mmu->base.subdev.device; struct nvkm_device *device = mmu->base.subdev.device;
struct nvkm_gpuobj *dma = mmu->vm->pgt[0].obj[0]; struct nvkm_memory *dma = mmu->vm->pgt[0].mem[0];
int ret; int ret;
ret = nvkm_mmu_init(&mmu->base); ret = nvkm_mmu_init(&mmu->base);
if (ret) if (ret)
return ret; return ret;
nvkm_wr32(device, 0x100800, dma->addr | 0x00000002); nvkm_wr32(device, 0x100800, 0x00000002 | nvkm_memory_addr(dma));
nvkm_mask(device, 0x10008c, 0x00000100, 0x00000100); nvkm_mask(device, 0x10008c, 0x00000100, 0x00000100);
nvkm_wr32(device, 0x100820, 0x00000000); nvkm_wr32(device, 0x100820, 0x00000000);
return 0; return 0;
......
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv44.c
View file @ d0659d32
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
******************************************************************************/ ******************************************************************************/
static void static void
nv44_vm_fill(struct nvkm_gpuobj *pgt, dma_addr_t null, nv44_vm_fill(struct nvkm_memory *pgt, dma_addr_t null,
dma_addr_t *list, u32 pte, u32 cnt) dma_addr_t *list, u32 pte, u32 cnt)
{ {
u32 base = (pte << 2) & ~0x0000000f; u32 base = (pte << 2) & ~0x0000000f;
...@@ -81,10 +81,10 @@ nv44_vm_fill(struct nvkm_gpuobj *pgt, dma_addr_t null, ...@@ -81,10 +81,10 @@ nv44_vm_fill(struct nvkm_gpuobj *pgt, dma_addr_t null,
} }
static void static void
nv44_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, nv44_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
{ {
struct nv04_mmu *mmu = (void *)vma->vm->mmu; struct nv04_mmu *mmu = nv04_mmu(vma->vm->mmu);
u32 tmp[4]; u32 tmp[4];
int i; int i;
...@@ -114,9 +114,9 @@ nv44_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, ...@@ -114,9 +114,9 @@ nv44_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt,
} }
static void static void
nv44_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt) nv44_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
{ {
struct nv04_mmu *mmu = (void *)nvkm_mmu(pgt); struct nv04_mmu *mmu = nv04_mmu(vma->vm->mmu);
nvkm_kmap(pgt); nvkm_kmap(pgt);
if (pte & 3) { if (pte & 3) {
...@@ -143,7 +143,7 @@ nv44_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt) ...@@ -143,7 +143,7 @@ nv44_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt)
static void static void
nv44_vm_flush(struct nvkm_vm *vm) nv44_vm_flush(struct nvkm_vm *vm)
{ {
struct nv04_mmu *mmu = (void *)vm->mmu; struct nv04_mmu *mmu = nv04_mmu(vm->mmu);
struct nvkm_device *device = mmu->base.subdev.device; struct nvkm_device *device = mmu->base.subdev.device;
nvkm_wr32(device, 0x100814, mmu->base.limit - NV44_GART_PAGE); nvkm_wr32(device, 0x100814, mmu->base.limit - NV44_GART_PAGE);
nvkm_wr32(device, 0x100808, 0x00000020); nvkm_wr32(device, 0x100808, 0x00000020);
...@@ -200,10 +200,10 @@ nv44_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine, ...@@ -200,10 +200,10 @@ nv44_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
if (ret) if (ret)
return ret; return ret;
ret = nvkm_gpuobj_new(nv_object(mmu), NULL, ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST,
(NV44_GART_SIZE / NV44_GART_PAGE) * 4, (NV44_GART_SIZE / NV44_GART_PAGE) * 4,
512 * 1024, NVOBJ_FLAG_ZERO_ALLOC, 512 * 1024, true,
&mmu->vm->pgt[0].obj[0]); &mmu->vm->pgt[0].mem[0]);
mmu->vm->pgt[0].refcount[0] = 1; mmu->vm->pgt[0].refcount[0] = 1;
if (ret) if (ret)
return ret; return ret;
...@@ -216,7 +216,7 @@ nv44_mmu_init(struct nvkm_object *object) ...@@ -216,7 +216,7 @@ nv44_mmu_init(struct nvkm_object *object)
{ {
struct nv04_mmu *mmu = (void *)object; struct nv04_mmu *mmu = (void *)object;
struct nvkm_device *device = mmu->base.subdev.device; struct nvkm_device *device = mmu->base.subdev.device;
struct nvkm_gpuobj *gart = mmu->vm->pgt[0].obj[0]; struct nvkm_memory *gart = mmu->vm->pgt[0].mem[0];
u32 addr; u32 addr;
int ret; int ret;
...@@ -229,7 +229,7 @@ nv44_mmu_init(struct nvkm_object *object) ...@@ -229,7 +229,7 @@ nv44_mmu_init(struct nvkm_object *object)
* of 512KiB for this to work correctly * of 512KiB for this to work correctly
*/ */
addr = nvkm_rd32(device, 0x10020c); addr = nvkm_rd32(device, 0x10020c);
addr -= ((gart->addr >> 19) + 1) << 19; addr -= ((nvkm_memory_addr(gart) >> 19) + 1) << 19;
nvkm_wr32(device, 0x100850, 0x80000000); nvkm_wr32(device, 0x100850, 0x80000000);
nvkm_wr32(device, 0x100818, mmu->null); nvkm_wr32(device, 0x100818, mmu->null);
......
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c
View file @ d0659d32
...@@ -29,18 +29,20 @@ ...@@ -29,18 +29,20 @@
#include <core/gpuobj.h> #include <core/gpuobj.h>
static void static void
nv50_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 pde, struct nvkm_gpuobj *pgt[2]) nv50_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 pde, struct nvkm_memory *pgt[2])
{ {
u64 phys = 0xdeadcafe00000000ULL; u64 phys = 0xdeadcafe00000000ULL;
u32 coverage = 0; u32 coverage = 0;
if (pgt[0]) { if (pgt[0]) {
phys = 0x00000003 | pgt[0]->addr; /* present, 4KiB pages */ /* present, 4KiB pages */
coverage = (pgt[0]->size >> 3) << 12; phys = 0x00000003 | nvkm_memory_addr(pgt[0]);
coverage = (nvkm_memory_size(pgt[0]) >> 3) << 12;
} else } else
if (pgt[1]) { if (pgt[1]) {
phys = 0x00000001 | pgt[1]->addr; /* present */ /* present, 64KiB pages */
coverage = (pgt[1]->size >> 3) << 16; phys = 0x00000001 | nvkm_memory_addr(pgt[1]);
coverage = (nvkm_memory_size(pgt[1]) >> 3) << 16;
} }
if (phys & 1) { if (phys & 1) {
...@@ -72,7 +74,7 @@ vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target) ...@@ -72,7 +74,7 @@ vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target)
} }
static void static void
nv50_vm_map(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt,
struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta) struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
{ {
u32 comp = (mem->memtype & 0x180) >> 7; u32 comp = (mem->memtype & 0x180) >> 7;
...@@ -121,7 +123,7 @@ nv50_vm_map(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, ...@@ -121,7 +123,7 @@ nv50_vm_map(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt,
} }
static void static void
nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
{ {
u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 3 : 2; u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 3 : 2;
...@@ -137,7 +139,7 @@ nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt, ...@@ -137,7 +139,7 @@ nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_gpuobj *pgt,
} }
static void static void
nv50_vm_unmap(struct nvkm_gpuobj *pgt, u32 pte, u32 cnt) nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
{ {
pte <<= 3; pte <<= 3;
nvkm_kmap(pgt); nvkm_kmap(pgt);
......
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