Commit d100033b authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amd/pp: Move smu_version to common code

Move the smu_version to struct hwmgr, so it can be shared
by other asics.
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 04a0d2d9
......@@ -426,9 +426,9 @@ static void vega10_init_dpm_defaults(struct pp_hwmgr *hwmgr)
data->smu_features[GNLD_VR0HOT].supported = true;
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
vega10_read_arg_from_smc(hwmgr, &(data->smu_version));
vega10_read_arg_from_smc(hwmgr, &(hwmgr->smu_version));
/* ACG firmware has major version 5 */
if ((data->smu_version & 0xff000000) == 0x5000000)
if ((hwmgr->smu_version & 0xff000000) == 0x5000000)
data->smu_features[GNLD_ACG].supported = true;
if (data->registry_data.didt_support)
......@@ -2879,8 +2879,8 @@ static int vega10_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
"DPM is already running right , skipping re-enablement!",
return 0);
if ((data->smu_version == 0x001c2c00) ||
(data->smu_version == 0x001c2d00)) {
if ((hwmgr->smu_version == 0x001c2c00) ||
(hwmgr->smu_version == 0x001c2d00)) {
tmp_result = smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_UpdatePkgPwrPidAlpha, 1);
PP_ASSERT_WITH_CODE(!tmp_result,
......
......@@ -387,7 +387,6 @@ struct vega10_hwmgr {
struct vega10_smc_state_table smc_state_table;
uint32_t config_telemetry;
uint32_t smu_version;
uint32_t acg_loop_state;
uint32_t mem_channels;
};
......
......@@ -692,6 +692,7 @@ enum PP_TABLE_VERSION {
struct pp_hwmgr {
uint32_t chip_family;
uint32_t chip_id;
uint32_t smu_version;
uint32_t pp_table_version;
void *device;
......
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