Commit d29f5aa0 authored by Heiner Kallweit's avatar Heiner Kallweit Committed by David S. Miller

net: phy: don't clear BMCR in genphy_soft_reset

So far we effectively clear the BMCR register. Some PHY's can deal
with this (e.g. because they reset BMCR to a default as part of a
soft-reset) whilst on others this causes issues because e.g. the
autoneg bit is cleared. Marvell is an example, see also thread [0].
So let's be a little bit more gentle and leave all bits we're not
interested in as-is. This change is needed for PHY drivers to
properly deal with the original patch.

[0] https://marc.info/?t=155264050700001&r=1&w=2

Fixes: 6e2d85ec ("net: phy: Stop with excessive soft reset")
Tested-by: default avatarPhil Reid <preid@electromag.com.au>
Tested-by: default avatarliweihang <liweihang@hisilicon.com>
Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 27602e2c
...@@ -1831,7 +1831,7 @@ int genphy_soft_reset(struct phy_device *phydev) ...@@ -1831,7 +1831,7 @@ int genphy_soft_reset(struct phy_device *phydev)
{ {
int ret; int ret;
ret = phy_write(phydev, MII_BMCR, BMCR_RESET); ret = phy_set_bits(phydev, MII_BMCR, BMCR_RESET);
if (ret < 0) if (ret < 0)
return ret; return ret;
......
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