Commit d34cf0d5 authored by Javier Martinez Canillas's avatar Javier Martinez Canillas Committed by Tony Lindgren

ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi

Only the IGEPv2 boards have a LAN9221i chip connected to the GPMC
so the pinmux configuration for the GPIO connected to the IRQ line
of the LAN chip should not be defined in the IGEP common dtsi but
in the one common to the IGEPv2 boards.

While there, use the OMAP3_CORE1_IOPAD() macro for the padconf reg.
Suggested-by: default avatarLadislav Michl <ladis@linux-mips.org>
Signed-off-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
Acked-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent c22c7f3e
...@@ -78,12 +78,6 @@ mmc2_pins: pinmux_mmc2_pins { ...@@ -78,12 +78,6 @@ mmc2_pins: pinmux_mmc2_pins {
>; >;
}; };
smsc9221_pins: pinmux_smsc9221_pins {
pinctrl-single,pins = <
0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
>;
};
i2c1_pins: pinmux_i2c1_pins { i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
......
...@@ -156,6 +156,12 @@ OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ ...@@ -156,6 +156,12 @@ OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
>; >;
}; };
smsc9221_pins: pinmux_smsc9221_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
>;
};
}; };
&omap3_pmx_core2 { &omap3_pmx_core2 {
......
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