Commit d4d9360b authored by Jiada Wang's avatar Jiada Wang Committed by Mark Brown

ASoC: rsnd: dma: set bus width to data width for monaural data

According to R-Car3 HW manual 40.3.3 (Data Format on Audio Local Bus),
in case of monaural data writing or reading through Audio-DMAC,
it's always in Left Justified format, so both src and dst
DMA Bus width should be equal to physical data width.

Therefore set src and dst's DMA bus width to:
 - [monaural case] data width
 - [non-monaural case] 32bits (as prior applying the patch)

Cc: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Cc: Timo Wischer <twischer@de.adit-jv.com>
Signed-off-by: default avatarJiada Wang <jiada_wang@mentor.com>
Signed-off-by: default avatarEugeniu Rosca <erosca@de.adit-jv.com>
Link: https://lore.kernel.org/r/20191022185518.12838-1-erosca@de.adit-jv.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 2b544dd7
...@@ -165,14 +165,40 @@ static int rsnd_dmaen_start(struct rsnd_mod *mod, ...@@ -165,14 +165,40 @@ static int rsnd_dmaen_start(struct rsnd_mod *mod,
struct device *dev = rsnd_priv_to_dev(priv); struct device *dev = rsnd_priv_to_dev(priv);
struct dma_async_tx_descriptor *desc; struct dma_async_tx_descriptor *desc;
struct dma_slave_config cfg = {}; struct dma_slave_config cfg = {};
enum dma_slave_buswidth buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES;
int is_play = rsnd_io_is_play(io); int is_play = rsnd_io_is_play(io);
int ret; int ret;
/*
* in case of monaural data writing or reading through Audio-DMAC
* data is always in Left Justified format, so both src and dst
* DMA Bus width need to be set equal to physical data width.
*/
if (rsnd_runtime_channel_original(io) == 1) {
struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
int bits = snd_pcm_format_physical_width(runtime->format);
switch (bits) {
case 8:
buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE;
break;
case 16:
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
break;
case 32:
buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES;
break;
default:
dev_err(dev, "invalid format width %d\n", bits);
return -EINVAL;
}
}
cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
cfg.src_addr = dma->src_addr; cfg.src_addr = dma->src_addr;
cfg.dst_addr = dma->dst_addr; cfg.dst_addr = dma->dst_addr;
cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; cfg.src_addr_width = buswidth;
cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; cfg.dst_addr_width = buswidth;
dev_dbg(dev, "%s %pad -> %pad\n", dev_dbg(dev, "%s %pad -> %pad\n",
rsnd_mod_name(mod), rsnd_mod_name(mod),
......
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