Commit d555dd50 authored by Russell King's avatar Russell King Committed by Russell King

Merge branch 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

parents 9d84588b 671c7235
......@@ -721,7 +721,8 @@ config LEDS
config LEDS_TIMER
bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
MACH_OMAP_H2 || MACH_OMAP_PERSEUS2
OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
|| MACH_OMAP_PERSEUS2
depends on LEDS
depends on !GENERIC_CLOCKEVENTS
default y if ARCH_EBSA110
......@@ -738,7 +739,9 @@ config LEDS_TIMER
config LEDS_CPU
bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
!ARCH_OMAP) || MACH_OMAP_H2 || MACH_OMAP_PERSEUS2
!ARCH_OMAP) \
|| OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
|| MACH_OMAP_PERSEUS2
depends on LEDS
help
If you say Y here, the red LED will be used to give a good real
......
......@@ -294,9 +294,11 @@ static int h3_select_irda(struct device *dev, int state)
return err;
}
static void set_trans_mode(void *data)
static void set_trans_mode(struct work_struct *work)
{
int *mode = data;
struct omap_irda_config *irda_config =
container_of(work, struct omap_irda_config, gpio_expa.work);
int mode = irda_config->mode;
unsigned char expa;
int err = 0;
......@@ -306,7 +308,7 @@ static void set_trans_mode(void *data)
expa &= ~0x03;
if (*mode & IR_SIRMODE) {
if (mode & IR_SIRMODE) {
expa |= 0x01;
} else { /* MIR/FIR */
expa |= 0x03;
......@@ -321,9 +323,9 @@ static int h3_transceiver_mode(struct device *dev, int mode)
{
struct omap_irda_config *irda_config = dev->platform_data;
irda_config->mode = mode;
cancel_delayed_work(&irda_config->gpio_expa);
PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
#error this is not permitted - mode is an argument variable
PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
schedule_delayed_work(&irda_config->gpio_expa, 0);
return 0;
......
......@@ -133,13 +133,13 @@ void osk_leds_event(led_event_t evt)
mistral_setled();
break;
case led_idle_start:
hw_led_state |= IDLE_LED;
case led_idle_start: /* idle == off */
hw_led_state &= ~IDLE_LED;
mistral_setled();
break;
case led_idle_end:
hw_led_state &= ~IDLE_LED;
hw_led_state |= IDLE_LED;
mistral_setled();
break;
......
......@@ -57,7 +57,6 @@
#include <asm/arch/tc.h>
#include <asm/arch/pm.h>
#include <asm/arch/mux.h>
#include <asm/arch/tps65010.h>
#include <asm/arch/dma.h>
#include <asm/arch/dsp_common.h>
#include <asm/arch/dmtimer.h>
......@@ -250,11 +249,6 @@ void omap_pm_suspend(void)
omap_serial_wake_trigger(1);
if (machine_is_omap_osk()) {
/* Stop LED1 (D9) blink */
tps65010_set_led(LED1, OFF);
}
if (!cpu_is_omap15xx())
omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
......@@ -447,11 +441,6 @@ void omap_pm_suspend(void)
omap_serial_wake_trigger(0);
printk("PM: OMAP%x is re-starting from deep sleep...\n", system_rev);
if (machine_is_omap_osk()) {
/* Let LED1 (D9) blink again */
tps65010_set_led(LED1, BLINK);
}
}
#if defined(DEBUG) && defined(CONFIG_PROC_FS)
......
......@@ -1160,8 +1160,8 @@ int __init omap2_clk_init(void)
clk_enable(&sync_32k_ick);
clk_enable(&omapctrl_ick);
/* Force the APLLs active during bootup to avoid disabling and
* enabling them unnecessarily. */
/* Force the APLLs always active. The clocks are idled
* automatically by hardware. */
clk_enable(&apll96_ck);
clk_enable(&apll54_ck);
......@@ -1174,12 +1174,3 @@ int __init omap2_clk_init(void)
return 0;
}
static int __init omap2_disable_aplls(void)
{
clk_disable(&apll96_ck);
clk_disable(&apll54_ck);
return 0;
}
late_initcall(omap2_disable_aplls);
......@@ -84,7 +84,7 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
serial_write_reg(p, UART_OMAP_MDR1, 0x07);
serial_write_reg(p, UART_OMAP_SCR, 0x08);
serial_write_reg(p, UART_OMAP_MDR1, 0x00);
serial_write_reg(p, UART_OMAP_SYSC, 0x01);
serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0));
}
void __init omap_serial_init()
......
......@@ -172,7 +172,7 @@ console_initcall(omap_add_serial_console);
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
#elif defined(CONFIG_ARCH_OMAP24XX)
#define TIMER_32K_SYNCHRONIZED 0x48004010
#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10)
#endif
#ifdef TIMER_32K_SYNCHRONIZED
......
......@@ -271,11 +271,6 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
#if defined(CONFIG_ARCH_OMAP1)
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{
BUG();
}
/**
* omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
* @inputmask: current value of idlect mask
......
......@@ -71,7 +71,7 @@ struct sys_timer omap_timer;
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
#elif defined(CONFIG_ARCH_OMAP24XX)
#define TIMER_32K_SYNCHRONIZED 0x48004010
#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10)
#else
#error OMAP 32KHz timer does not currently work on 15XX!
#endif
......@@ -147,14 +147,15 @@ static inline void omap_32k_timer_ack_irq(void)
static void omap_32k_timer_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
omap_32k_timer_stop();
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_PERIODIC:
omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
break;
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
omap_32k_timer_stop();
break;
case CLOCK_EVT_MODE_RESUME:
break;
......@@ -194,8 +195,6 @@ omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9;
}
static unsigned long omap_32k_last_tick = 0;
/*
* Returns current time from boot in nsecs. It's OK for this to wrap
* around for now, as it's just a relative time stamp.
......@@ -225,7 +224,6 @@ static __init void omap_init_32k_timer(void)
{
if (cpu_class_is_omap1())
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
omap_32k_last_tick = omap_32k_sync_timer_read();
#ifdef CONFIG_ARCH_OMAP2
/* REVISIT: Check 24xx TIOCP_CFG settings after idle works */
......
......@@ -31,6 +31,7 @@ struct omap_irda_config {
unsigned long src_start;
int tx_trigger;
int rx_trigger;
int mode;
};
#endif
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