Commit d829cefd authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://gkernel.bkbits.net/libata-2.6

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 0ee381c2 82c687e4
...@@ -95,6 +95,26 @@ if BLK_DEV_IDE ...@@ -95,6 +95,26 @@ if BLK_DEV_IDE
comment "Please see Documentation/ide.txt for help/info on IDE drives" comment "Please see Documentation/ide.txt for help/info on IDE drives"
config BLK_DEV_IDE_SATA
bool "Support for SATA (deprecated; conflicts with libata SATA driver)"
default n
---help---
There are two drivers for Serial ATA controllers.
The main driver, "libata", exists inside the SCSI subsystem
and supports most modern SATA controllers.
The IDE driver (which you are currently configuring) supports
a few first-generation SATA controllers.
In order to eliminate conflicts between the two subsystems,
this config option enables the IDE driver's SATA support.
Normally this is disabled, as it is preferred that libata
supports SATA controllers, and this (IDE) driver supports
PATA controllers.
If unsure, say N.
config BLK_DEV_HD_IDE config BLK_DEV_HD_IDE
bool "Use old disk-only driver on primary interface" bool "Use old disk-only driver on primary interface"
depends on (X86 || SH_MPC1211) depends on (X86 || SH_MPC1211)
......
...@@ -71,11 +71,7 @@ static struct amd_ide_chip { ...@@ -71,11 +71,7 @@ static struct amd_ide_chip {
{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, AMD_UDMA_133 }, { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, AMD_UDMA_133 }, { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, AMD_UDMA_133 }, { PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, AMD_UDMA_133 }, { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, 0x50, AMD_UDMA_133 },
{ 0 } { 0 }
}; };
...@@ -487,11 +483,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -487,11 +483,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
/* 11 */ DECLARE_NV_DEV("NFORCE3-250-SATA"), /* 11 */ DECLARE_NV_DEV("NFORCE3-250-SATA"),
/* 12 */ DECLARE_NV_DEV("NFORCE3-250-SATA2"), /* 12 */ DECLARE_NV_DEV("NFORCE3-250-SATA2"),
/* 13 */ DECLARE_NV_DEV("NFORCE-CK804"), /* 13 */ DECLARE_NV_DEV("NFORCE-CK804"),
/* 14 */ DECLARE_NV_DEV("NFORCE-CK804-SATA"), /* 14 */ DECLARE_NV_DEV("NFORCE-MCP04"),
/* 15 */ DECLARE_NV_DEV("NFORCE-CK804-SATA2"),
/* 16 */ DECLARE_NV_DEV("NFORCE-MCP04"),
/* 17 */ DECLARE_NV_DEV("NFORCE-MCP04-SATA"),
/* 18 */ DECLARE_NV_DEV("NFORCE-MCP04-SATA2")
}; };
static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id) static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id)
...@@ -512,17 +504,17 @@ static struct pci_device_id amd74xx_pci_tbl[] = { ...@@ -512,17 +504,17 @@ static struct pci_device_id amd74xx_pci_tbl[] = {
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
#ifdef CONFIG_BLK_DEV_IDE_SATA
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
#endif
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
#ifdef CONFIG_BLK_DEV_IDE_SATA
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
#endif
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18 },
{ 0, }, { 0, },
}; };
MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl); MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl);
......
...@@ -127,7 +127,9 @@ static struct pci_device_id generic_pci_tbl[] = { ...@@ -127,7 +127,9 @@ static struct pci_device_id generic_pci_tbl[] = {
{ PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6}, { PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6},
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7}, { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7},
{ PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8}, { PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8},
#ifdef CONFIG_BLK_DEV_IDE_SATA
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9}, { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9},
#endif
{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10}, { PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10},
{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11}, { PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11},
{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12}, { PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12},
......
...@@ -793,9 +793,9 @@ static struct pci_device_id piix_pci_tbl[] = { ...@@ -793,9 +793,9 @@ static struct pci_device_id piix_pci_tbl[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_11,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_11,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_11, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_11, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_10,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_10,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17},
#ifndef CONFIG_SCSI_SATA #ifdef CONFIG_BLK_DEV_IDE_SATA
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18},
#endif /* !CONFIG_SCSI_SATA */ #endif
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_19, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_19, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20},
{ 0, }, { 0, },
......
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
* if neccessary * if neccessary
*/ */
#include <linux/config.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/pci.h> #include <linux/pci.h>
...@@ -1127,8 +1128,10 @@ static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_devi ...@@ -1127,8 +1128,10 @@ static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_devi
static struct pci_device_id siimage_pci_tbl[] = { static struct pci_device_id siimage_pci_tbl[] = {
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
#ifdef CONFIG_BLK_DEV_IDE_SATA
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
#endif
{ 0, }, { 0, },
}; };
MODULE_DEVICE_TABLE(pci, siimage_pci_tbl); MODULE_DEVICE_TABLE(pci, siimage_pci_tbl);
......
...@@ -433,6 +433,14 @@ config SCSI_ATA_PIIX ...@@ -433,6 +433,14 @@ config SCSI_ATA_PIIX
If unsure, say N. If unsure, say N.
config SCSI_SATA_NV
tristate "NVIDIA SATA support"
depends on SCSI_SATA && PCI && EXPERIMENTAL
help
This option enables support for NVIDIA Serial ATA.
If unsure, say N.
config SCSI_SATA_PROMISE config SCSI_SATA_PROMISE
tristate "Promise SATA TX2/TX4 support" tristate "Promise SATA TX2/TX4 support"
depends on SCSI_SATA && PCI depends on SCSI_SATA && PCI
......
...@@ -127,6 +127,7 @@ obj-$(CONFIG_SCSI_SATA_VIA) += libata.o sata_via.o ...@@ -127,6 +127,7 @@ obj-$(CONFIG_SCSI_SATA_VIA) += libata.o sata_via.o
obj-$(CONFIG_SCSI_SATA_VITESSE) += libata.o sata_vsc.o obj-$(CONFIG_SCSI_SATA_VITESSE) += libata.o sata_vsc.o
obj-$(CONFIG_SCSI_SATA_SIS) += libata.o sata_sis.o obj-$(CONFIG_SCSI_SATA_SIS) += libata.o sata_sis.o
obj-$(CONFIG_SCSI_SATA_SX4) += libata.o sata_sx4.o obj-$(CONFIG_SCSI_SATA_SX4) += libata.o sata_sx4.o
obj-$(CONFIG_SCSI_SATA_NV) += libata.o sata_nv.o
obj-$(CONFIG_ARM) += arm/ obj-$(CONFIG_ARM) += arm/
......
...@@ -57,6 +57,7 @@ enum { ...@@ -57,6 +57,7 @@ enum {
ich5_pata = 0, ich5_pata = 0,
ich5_sata = 1, ich5_sata = 1,
piix4_pata = 2, piix4_pata = 2,
ich6_sata = 3,
}; };
static int piix_init_one (struct pci_dev *pdev, static int piix_init_one (struct pci_dev *pdev,
...@@ -91,10 +92,8 @@ static struct pci_device_id piix_pci_tbl[] = { ...@@ -91,10 +92,8 @@ static struct pci_device_id piix_pci_tbl[] = {
* and enhanced mode, with queueing and other fancy stuff. * and enhanced mode, with queueing and other fancy stuff.
* This is distinguished by PCI class code. * This is distinguished by PCI class code.
*/ */
{ 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, { 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich5_sata }, { 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich5_sata },
{ } /* terminate list */ { } /* terminate list */
}; };
...@@ -138,7 +137,7 @@ static struct ata_port_operations piix_pata_ops = { ...@@ -138,7 +137,7 @@ static struct ata_port_operations piix_pata_ops = {
.bmdma_setup = ata_bmdma_setup_pio, .bmdma_setup = ata_bmdma_setup_pio,
.bmdma_start = ata_bmdma_start_pio, .bmdma_start = ata_bmdma_start_pio,
.fill_sg = ata_fill_sg, .qc_prep = ata_qc_prep,
.eng_timeout = ata_eng_timeout, .eng_timeout = ata_eng_timeout,
.irq_handler = ata_interrupt, .irq_handler = ata_interrupt,
...@@ -161,7 +160,7 @@ static struct ata_port_operations piix_sata_ops = { ...@@ -161,7 +160,7 @@ static struct ata_port_operations piix_sata_ops = {
.bmdma_setup = ata_bmdma_setup_pio, .bmdma_setup = ata_bmdma_setup_pio,
.bmdma_start = ata_bmdma_start_pio, .bmdma_start = ata_bmdma_start_pio,
.fill_sg = ata_fill_sg, .qc_prep = ata_qc_prep,
.eng_timeout = ata_eng_timeout, .eng_timeout = ata_eng_timeout,
.irq_handler = ata_interrupt, .irq_handler = ata_interrupt,
...@@ -199,6 +198,17 @@ static struct ata_port_info piix_port_info[] = { ...@@ -199,6 +198,17 @@ static struct ata_port_info piix_port_info[] = {
.udma_mask = ATA_UDMA_MASK_40C, /* FIXME: cbl det */ .udma_mask = ATA_UDMA_MASK_40C, /* FIXME: cbl det */
.port_ops = &piix_pata_ops, .port_ops = &piix_pata_ops,
}, },
/* ich6_sata */
{
.sht = &piix_sht,
.host_flags = ATA_FLAG_SATA | ATA_FLAG_SRST |
PIIX_FLAG_COMBINED | PIIX_FLAG_CHECKINTR |
ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x03, /* pio3-4 */
.udma_mask = 0x7f, /* udma0-6 ; FIXME */
.port_ops = &piix_sata_ops,
},
}; };
static struct pci_bits piix_enable_bits[] = { static struct pci_bits piix_enable_bits[] = {
...@@ -327,13 +337,6 @@ static int piix_sata_probe (struct ata_port *ap) ...@@ -327,13 +337,6 @@ static int piix_sata_probe (struct ata_port *ap)
static void piix_sata_phy_reset(struct ata_port *ap) static void piix_sata_phy_reset(struct ata_port *ap)
{ {
if (!pci_test_config_bits(ap->host_set->pdev,
&piix_enable_bits[ap->port_no])) {
ata_port_disable(ap);
printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
return;
}
if (!piix_sata_probe(ap)) { if (!piix_sata_probe(ap)) {
ata_port_disable(ap); ata_port_disable(ap);
printk(KERN_INFO "ata%u: SATA port has no device.\n", ap->id); printk(KERN_INFO "ata%u: SATA port has no device.\n", ap->id);
......
This diff is collapsed.
This diff is collapsed.
...@@ -81,7 +81,7 @@ static void pdc_eng_timeout(struct ata_port *ap); ...@@ -81,7 +81,7 @@ static void pdc_eng_timeout(struct ata_port *ap);
static int pdc_port_start(struct ata_port *ap); static int pdc_port_start(struct ata_port *ap);
static void pdc_port_stop(struct ata_port *ap); static void pdc_port_stop(struct ata_port *ap);
static void pdc_phy_reset(struct ata_port *ap); static void pdc_phy_reset(struct ata_port *ap);
static void pdc_fill_sg(struct ata_queued_cmd *qc); static void pdc_qc_prep(struct ata_queued_cmd *qc);
static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf); static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf);
static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf);
static inline void pdc_dma_complete (struct ata_port *ap, static inline void pdc_dma_complete (struct ata_port *ap,
...@@ -114,7 +114,7 @@ static struct ata_port_operations pdc_sata_ops = { ...@@ -114,7 +114,7 @@ static struct ata_port_operations pdc_sata_ops = {
.phy_reset = pdc_phy_reset, .phy_reset = pdc_phy_reset,
.bmdma_setup = pdc_dma_setup, .bmdma_setup = pdc_dma_setup,
.bmdma_start = pdc_dma_start, .bmdma_start = pdc_dma_start,
.fill_sg = pdc_fill_sg, .qc_prep = pdc_qc_prep,
.eng_timeout = pdc_eng_timeout, .eng_timeout = pdc_eng_timeout,
.irq_handler = pdc_interrupt, .irq_handler = pdc_interrupt,
.scr_read = pdc_sata_scr_read, .scr_read = pdc_sata_scr_read,
...@@ -261,14 +261,14 @@ static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, ...@@ -261,14 +261,14 @@ static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
writel(val, (void *) ap->ioaddr.scr_addr + (sc_reg * 4)); writel(val, (void *) ap->ioaddr.scr_addr + (sc_reg * 4));
} }
static void pdc_fill_sg(struct ata_queued_cmd *qc) static void pdc_qc_prep(struct ata_queued_cmd *qc)
{ {
struct pdc_port_priv *pp = qc->ap->private_data; struct pdc_port_priv *pp = qc->ap->private_data;
unsigned int i; unsigned int i;
VPRINTK("ENTER\n"); VPRINTK("ENTER\n");
ata_fill_sg(qc); ata_qc_prep(qc);
i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma, qc->dev->devno, pp->pkt); i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma, qc->dev->devno, pp->pkt);
......
...@@ -131,7 +131,7 @@ static struct ata_port_operations sil_ops = { ...@@ -131,7 +131,7 @@ static struct ata_port_operations sil_ops = {
.post_set_mode = sil_post_set_mode, .post_set_mode = sil_post_set_mode,
.bmdma_setup = ata_bmdma_setup_mmio, .bmdma_setup = ata_bmdma_setup_mmio,
.bmdma_start = ata_bmdma_start_mmio, .bmdma_start = ata_bmdma_start_mmio,
.fill_sg = ata_fill_sg, .qc_prep = ata_qc_prep,
.eng_timeout = ata_eng_timeout, .eng_timeout = ata_eng_timeout,
.irq_handler = ata_interrupt, .irq_handler = ata_interrupt,
.scr_read = sil_scr_read, .scr_read = sil_scr_read,
......
...@@ -100,7 +100,7 @@ static struct ata_port_operations sis_ops = { ...@@ -100,7 +100,7 @@ static struct ata_port_operations sis_ops = {
.phy_reset = sata_phy_reset, .phy_reset = sata_phy_reset,
.bmdma_setup = ata_bmdma_setup_pio, .bmdma_setup = ata_bmdma_setup_pio,
.bmdma_start = ata_bmdma_start_pio, .bmdma_start = ata_bmdma_start_pio,
.fill_sg = ata_fill_sg, .qc_prep = ata_qc_prep,
.eng_timeout = ata_eng_timeout, .eng_timeout = ata_eng_timeout,
.irq_handler = ata_interrupt, .irq_handler = ata_interrupt,
.scr_read = sis_scr_read, .scr_read = sis_scr_read,
......
...@@ -233,7 +233,7 @@ static struct ata_port_operations k2_sata_ops = { ...@@ -233,7 +233,7 @@ static struct ata_port_operations k2_sata_ops = {
.phy_reset = sata_phy_reset, .phy_reset = sata_phy_reset,
.bmdma_setup = ata_bmdma_setup_mmio, .bmdma_setup = ata_bmdma_setup_mmio,
.bmdma_start = ata_bmdma_start_mmio, .bmdma_start = ata_bmdma_start_mmio,
.fill_sg = ata_fill_sg, .qc_prep = ata_qc_prep,
.eng_timeout = ata_eng_timeout, .eng_timeout = ata_eng_timeout,
.irq_handler = ata_interrupt, .irq_handler = ata_interrupt,
.scr_read = k2_sata_scr_read, .scr_read = k2_sata_scr_read,
......
...@@ -153,7 +153,7 @@ static void pdc_eng_timeout(struct ata_port *ap); ...@@ -153,7 +153,7 @@ static void pdc_eng_timeout(struct ata_port *ap);
static void pdc_20621_phy_reset (struct ata_port *ap); static void pdc_20621_phy_reset (struct ata_port *ap);
static int pdc_port_start(struct ata_port *ap); static int pdc_port_start(struct ata_port *ap);
static void pdc_port_stop(struct ata_port *ap); static void pdc_port_stop(struct ata_port *ap);
static void pdc20621_fill_sg(struct ata_queued_cmd *qc); static void pdc20621_qc_prep(struct ata_queued_cmd *qc);
static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf); static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf);
static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf);
static void pdc20621_host_stop(struct ata_host_set *host_set); static void pdc20621_host_stop(struct ata_host_set *host_set);
...@@ -200,7 +200,7 @@ static struct ata_port_operations pdc_20621_ops = { ...@@ -200,7 +200,7 @@ static struct ata_port_operations pdc_20621_ops = {
.phy_reset = pdc_20621_phy_reset, .phy_reset = pdc_20621_phy_reset,
.bmdma_setup = pdc20621_dma_setup, .bmdma_setup = pdc20621_dma_setup,
.bmdma_start = pdc20621_dma_start, .bmdma_start = pdc20621_dma_start,
.fill_sg = pdc20621_fill_sg, .qc_prep = pdc20621_qc_prep,
.eng_timeout = pdc_eng_timeout, .eng_timeout = pdc_eng_timeout,
.irq_handler = pdc20621_interrupt, .irq_handler = pdc20621_interrupt,
.port_start = pdc_port_start, .port_start = pdc_port_start,
...@@ -434,7 +434,7 @@ static inline void pdc20621_host_pkt(struct ata_taskfile *tf, u8 *buf, ...@@ -434,7 +434,7 @@ static inline void pdc20621_host_pkt(struct ata_taskfile *tf, u8 *buf,
buf32[dw + 3]); buf32[dw + 3]);
} }
static void pdc20621_fill_sg(struct ata_queued_cmd *qc) static void pdc20621_qc_prep(struct ata_queued_cmd *qc)
{ {
struct scatterlist *sg = qc->sg; struct scatterlist *sg = qc->sg;
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
...@@ -446,6 +446,9 @@ static void pdc20621_fill_sg(struct ata_queued_cmd *qc) ...@@ -446,6 +446,9 @@ static void pdc20621_fill_sg(struct ata_queued_cmd *qc)
unsigned int i, last, idx, total_len = 0, sgt_len; unsigned int i, last, idx, total_len = 0, sgt_len;
u32 *buf = (u32 *) &pp->dimm_buf[PDC_DIMM_HEADER_SZ]; u32 *buf = (u32 *) &pp->dimm_buf[PDC_DIMM_HEADER_SZ];
if (!(qc->flags & ATA_QCFLAG_SG))
return;
VPRINTK("ata%u: ENTER\n", ap->id); VPRINTK("ata%u: ENTER\n", ap->id);
/* hard-code chip #0 */ /* hard-code chip #0 */
......
...@@ -108,7 +108,7 @@ static struct ata_port_operations svia_sata_ops = { ...@@ -108,7 +108,7 @@ static struct ata_port_operations svia_sata_ops = {
.bmdma_setup = ata_bmdma_setup_pio, .bmdma_setup = ata_bmdma_setup_pio,
.bmdma_start = ata_bmdma_start_pio, .bmdma_start = ata_bmdma_start_pio,
.fill_sg = ata_fill_sg, .qc_prep = ata_qc_prep,
.eng_timeout = ata_eng_timeout, .eng_timeout = ata_eng_timeout,
.irq_handler = ata_interrupt, .irq_handler = ata_interrupt,
......
...@@ -215,7 +215,7 @@ static struct ata_port_operations vsc_sata_ops = { ...@@ -215,7 +215,7 @@ static struct ata_port_operations vsc_sata_ops = {
.phy_reset = sata_phy_reset, .phy_reset = sata_phy_reset,
.bmdma_setup = ata_bmdma_setup_mmio, .bmdma_setup = ata_bmdma_setup_mmio,
.bmdma_start = ata_bmdma_start_mmio, .bmdma_start = ata_bmdma_start_mmio,
.fill_sg = ata_fill_sg, .qc_prep = ata_qc_prep,
.eng_timeout = ata_eng_timeout, .eng_timeout = ata_eng_timeout,
.irq_handler = vsc_sata_interrupt, .irq_handler = vsc_sata_interrupt,
.scr_read = vsc_sata_scr_read, .scr_read = vsc_sata_scr_read,
......
...@@ -133,24 +133,10 @@ enum { ...@@ -133,24 +133,10 @@ enum {
BUS_IDENTIFY = 8, BUS_IDENTIFY = 8,
BUS_PACKET = 9, BUS_PACKET = 9,
/* thread states */
THR_UNKNOWN = 0,
THR_PORT_RESET = (THR_UNKNOWN + 1),
THR_AWAIT_DEATH = (THR_PORT_RESET + 1),
THR_PROBE_FAILED = (THR_AWAIT_DEATH + 1),
THR_IDLE = (THR_PROBE_FAILED + 1),
THR_PROBE_SUCCESS = (THR_IDLE + 1),
THR_PROBE_START = (THR_PROBE_SUCCESS + 1),
/* SATA port states */ /* SATA port states */
PORT_UNKNOWN = 0, PORT_UNKNOWN = 0,
PORT_ENABLED = 1, PORT_ENABLED = 1,
PORT_DISABLED = 2, PORT_DISABLED = 2,
/* ata_qc_cb_t flags - note uses above ATA_QCFLAG_xxx namespace,
* but not numberspace
*/
ATA_QCFLAG_TIMEOUT = (1 << 0),
}; };
enum pio_task_states { enum pio_task_states {
...@@ -294,18 +280,12 @@ struct ata_port { ...@@ -294,18 +280,12 @@ struct ata_port {
struct ata_host_stats stats; struct ata_host_stats stats;
struct ata_host_set *host_set; struct ata_host_set *host_set;
struct semaphore probe_sem;
unsigned int thr_state;
struct work_struct packet_task; struct work_struct packet_task;
struct work_struct pio_task; struct work_struct pio_task;
unsigned int pio_task_state; unsigned int pio_task_state;
unsigned long pio_task_timeout; unsigned long pio_task_timeout;
struct work_struct probe_task;
void *private_data; void *private_data;
}; };
...@@ -330,7 +310,7 @@ struct ata_port_operations { ...@@ -330,7 +310,7 @@ struct ata_port_operations {
void (*bmdma_setup) (struct ata_queued_cmd *qc); void (*bmdma_setup) (struct ata_queued_cmd *qc);
void (*bmdma_start) (struct ata_queued_cmd *qc); void (*bmdma_start) (struct ata_queued_cmd *qc);
void (*fill_sg) (struct ata_queued_cmd *qc); void (*qc_prep) (struct ata_queued_cmd *qc);
void (*eng_timeout) (struct ata_port *ap); void (*eng_timeout) (struct ata_port *ap);
irqreturn_t (*irq_handler)(int, void *, struct pt_regs *); irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
...@@ -390,7 +370,7 @@ extern void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); ...@@ -390,7 +370,7 @@ extern void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf);
extern int ata_port_start (struct ata_port *ap); extern int ata_port_start (struct ata_port *ap);
extern void ata_port_stop (struct ata_port *ap); extern void ata_port_stop (struct ata_port *ap);
extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs); extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
extern void ata_fill_sg(struct ata_queued_cmd *qc); extern void ata_qc_prep(struct ata_queued_cmd *qc);
extern void ata_dev_id_string(struct ata_device *dev, unsigned char *s, extern void ata_dev_id_string(struct ata_device *dev, unsigned char *s,
unsigned int ofs, unsigned int len); unsigned int ofs, unsigned int len);
extern void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc); extern void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc);
...@@ -556,4 +536,44 @@ static inline unsigned int sata_dev_present(struct ata_port *ap) ...@@ -556,4 +536,44 @@ static inline unsigned int sata_dev_present(struct ata_port *ap)
return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0; return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
} }
static inline void ata_bmdma_stop(struct ata_port *ap)
{
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = (void *) ap->ioaddr.bmdma_addr;
/* clear start/stop bit */
writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
mmio + ATA_DMA_CMD);
} else {
/* clear start/stop bit */
outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
}
/* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
ata_altstatus(ap); /* dummy read */
}
static inline void ata_bmdma_ack_irq(struct ata_port *ap)
{
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = ((void *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
writeb(readb(mmio), mmio);
} else {
unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
outb(inb(addr), addr);
}
}
static inline u8 ata_bmdma_status(struct ata_port *ap)
{
u8 host_stat;
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = (void *) ap->ioaddr.bmdma_addr;
host_stat = readb(mmio + ATA_DMA_STATUS);
} else
host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
return host_stat;
}
#endif /* __LINUX_LIBATA_H__ */ #endif /* __LINUX_LIBATA_H__ */
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