Commit d84835b1 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'riscv-for-linus-5.9-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fix from Palmer Dabbelt:
 "I collected a single fix during the merge window: we managed to break
  the early trap setup on !MMU, this fixes it"

* tag 'riscv-for-linus-5.9-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Setup exception vector for nommu platform
parents 5bbec3cf 76d4467a
...@@ -77,16 +77,10 @@ relocate: ...@@ -77,16 +77,10 @@ relocate:
csrw CSR_SATP, a0 csrw CSR_SATP, a0
.align 2 .align 2
1: 1:
/* Set trap vector to exception handler */ /* Set trap vector to spin forever to help debug */
la a0, handle_exception la a0, .Lsecondary_park
csrw CSR_TVEC, a0 csrw CSR_TVEC, a0
/*
* Set sup0 scratch register to 0, indicating to exception vector that
* we are presently executing in kernel.
*/
csrw CSR_SCRATCH, zero
/* Reload the global pointer */ /* Reload the global pointer */
.option push .option push
.option norelax .option norelax
...@@ -144,9 +138,23 @@ secondary_start_common: ...@@ -144,9 +138,23 @@ secondary_start_common:
la a0, swapper_pg_dir la a0, swapper_pg_dir
call relocate call relocate
#endif #endif
call setup_trap_vector
tail smp_callin tail smp_callin
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
.align 2
setup_trap_vector:
/* Set trap vector to exception handler */
la a0, handle_exception
csrw CSR_TVEC, a0
/*
* Set sup0 scratch register to 0, indicating to exception vector that
* we are presently executing in kernel.
*/
csrw CSR_SCRATCH, zero
ret
.Lsecondary_park: .Lsecondary_park:
/* We lack SMP support or have too many harts, so park this hart */ /* We lack SMP support or have too many harts, so park this hart */
wfi wfi
...@@ -240,6 +248,7 @@ clear_bss_done: ...@@ -240,6 +248,7 @@ clear_bss_done:
call relocate call relocate
#endif /* CONFIG_MMU */ #endif /* CONFIG_MMU */
call setup_trap_vector
/* Restore C environment */ /* Restore C environment */
la tp, init_task la tp, init_task
sw zero, TASK_TI_CPU(tp) sw zero, TASK_TI_CPU(tp)
......
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