Commit d84c572d authored by Rob Herring's avatar Rob Herring Committed by Lorenzo Pieralisi

PCI: rockchip: Use pci_is_root_bus() to check if bus is root bus

Use pci_is_root_bus() rather than tracking the root bus number to
determine if the bus is the root bus or not. This removes storing
duplicated data as well as the need for the host bridge driver to have
to care about the bus numbers in most cases.

Also, bridge->busnr is never set so effectively the root bus must be 0.
This will be fixed by a subsequent commit.

Link: https://lore.kernel.org/r/20200722022514.1283916-10-robh@kernel.orgSigned-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
parent 49169c25
...@@ -72,14 +72,14 @@ static int rockchip_pcie_valid_device(struct rockchip_pcie *rockchip, ...@@ -72,14 +72,14 @@ static int rockchip_pcie_valid_device(struct rockchip_pcie *rockchip,
struct pci_bus *bus, int dev) struct pci_bus *bus, int dev)
{ {
/* access only one slot on each root port */ /* access only one slot on each root port */
if (bus->number == rockchip->root_bus_nr && dev > 0) if (pci_is_root_bus(bus) && dev > 0)
return 0; return 0;
/* /*
* do not read more than one device on the bus directly attached * do not read more than one device on the bus directly attached
* to RC's downstream side. * to RC's downstream side.
*/ */
if (bus->primary == rockchip->root_bus_nr && dev > 0) if (pci_is_root_bus(bus->parent) && dev > 0)
return 0; return 0;
return 1; return 1;
...@@ -170,7 +170,7 @@ static int rockchip_pcie_rd_other_conf(struct rockchip_pcie *rockchip, ...@@ -170,7 +170,7 @@ static int rockchip_pcie_rd_other_conf(struct rockchip_pcie *rockchip,
return PCIBIOS_BAD_REGISTER_NUMBER; return PCIBIOS_BAD_REGISTER_NUMBER;
} }
if (bus->parent->number == rockchip->root_bus_nr) if (pci_is_root_bus(bus->parent))
rockchip_pcie_cfg_configuration_accesses(rockchip, rockchip_pcie_cfg_configuration_accesses(rockchip,
AXI_WRAPPER_TYPE0_CFG); AXI_WRAPPER_TYPE0_CFG);
else else
...@@ -201,7 +201,7 @@ static int rockchip_pcie_wr_other_conf(struct rockchip_pcie *rockchip, ...@@ -201,7 +201,7 @@ static int rockchip_pcie_wr_other_conf(struct rockchip_pcie *rockchip,
if (!IS_ALIGNED(busdev, size)) if (!IS_ALIGNED(busdev, size))
return PCIBIOS_BAD_REGISTER_NUMBER; return PCIBIOS_BAD_REGISTER_NUMBER;
if (bus->parent->number == rockchip->root_bus_nr) if (pci_is_root_bus(bus->parent))
rockchip_pcie_cfg_configuration_accesses(rockchip, rockchip_pcie_cfg_configuration_accesses(rockchip,
AXI_WRAPPER_TYPE0_CFG); AXI_WRAPPER_TYPE0_CFG);
else else
...@@ -230,7 +230,7 @@ static int rockchip_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, ...@@ -230,7 +230,7 @@ static int rockchip_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
} }
if (bus->number == rockchip->root_bus_nr) if (pci_is_root_bus(bus))
return rockchip_pcie_rd_own_conf(rockchip, where, size, val); return rockchip_pcie_rd_own_conf(rockchip, where, size, val);
return rockchip_pcie_rd_other_conf(rockchip, bus, devfn, where, size, return rockchip_pcie_rd_other_conf(rockchip, bus, devfn, where, size,
...@@ -245,7 +245,7 @@ static int rockchip_pcie_wr_conf(struct pci_bus *bus, u32 devfn, ...@@ -245,7 +245,7 @@ static int rockchip_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
if (!rockchip_pcie_valid_device(rockchip, bus, PCI_SLOT(devfn))) if (!rockchip_pcie_valid_device(rockchip, bus, PCI_SLOT(devfn)))
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
if (bus->number == rockchip->root_bus_nr) if (pci_is_root_bus(bus))
return rockchip_pcie_wr_own_conf(rockchip, where, size, val); return rockchip_pcie_wr_own_conf(rockchip, where, size, val);
return rockchip_pcie_wr_other_conf(rockchip, bus, devfn, where, size, return rockchip_pcie_wr_other_conf(rockchip, bus, devfn, where, size,
...@@ -950,7 +950,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev) ...@@ -950,7 +950,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
struct rockchip_pcie *rockchip; struct rockchip_pcie *rockchip;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct pci_host_bridge *bridge; struct pci_host_bridge *bridge;
struct resource *bus_res;
int err; int err;
if (!dev->of_node) if (!dev->of_node)
...@@ -991,12 +990,10 @@ static int rockchip_pcie_probe(struct platform_device *pdev) ...@@ -991,12 +990,10 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
goto err_deinit_port; goto err_deinit_port;
err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, err = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
&bridge->dma_ranges, &bus_res); &bridge->dma_ranges, NULL);
if (err) if (err)
goto err_remove_irq_domain; goto err_remove_irq_domain;
rockchip->root_bus_nr = bus_res->start;
err = rockchip_pcie_cfg_atu(rockchip); err = rockchip_pcie_cfg_atu(rockchip);
if (err) if (err)
goto err_remove_irq_domain; goto err_remove_irq_domain;
......
...@@ -298,7 +298,6 @@ struct rockchip_pcie { ...@@ -298,7 +298,6 @@ struct rockchip_pcie {
struct gpio_desc *ep_gpio; struct gpio_desc *ep_gpio;
u32 lanes; u32 lanes;
u8 lanes_map; u8 lanes_map;
u8 root_bus_nr;
int link_gen; int link_gen;
struct device *dev; struct device *dev;
struct irq_domain *irq_domain; struct irq_domain *irq_domain;
......
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