Commit d90df978 authored by Shawn Guo's avatar Shawn Guo

ARM: imx: enable cpufreq for imx6q

It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver.
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent c9250388
......@@ -36,6 +36,14 @@ cpu@0 {
compatible = "arm,cortex-a9";
reg = <0>;
next-level-cache = <&L2>;
operating-points = <
/* kHz uV */
792000 1100000
396000 950000
198000 850000
>;
clock-latency = <61036>; /* two CLK32 periods */
cpu0-supply = <&reg_cpu>;
};
cpu@1 {
......@@ -447,7 +455,7 @@ regulator-2p5@130 {
anatop-max-voltage = <2750000>;
};
regulator-vddcore@140 {
reg_cpu: regulator-vddcore@140 {
compatible = "fsl,anatop-regulator";
regulator-name = "cpu";
regulator-min-microvolt = <725000>;
......
......@@ -829,6 +829,8 @@ config SOC_IMX53
config SOC_IMX6Q
bool "i.MX6 Quad support"
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select ARM_CPU_SUSPEND if PM
select ARM_GIC
select COMMON_CLK
......@@ -841,6 +843,7 @@ config SOC_IMX6Q
select MFD_SYSCON
select PINCTRL
select PINCTRL_IMX6Q
select PM_OPP if PM
help
This enables support for Freescale i.MX6 Quad processor.
......
......@@ -406,6 +406,7 @@ int __init mx6q_clocks_init(void)
clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
clk_register_clkdev(clk[ahb], "ahb", NULL);
clk_register_clkdev(clk[cko1], "cko1", NULL);
clk_register_clkdev(clk[arm], NULL, "cpu0");
/*
* The gpmi needs 100MHz frequency in the EDO/Sync mode,
......
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