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Commit d94a27bf authored by George G. Davis's avatar George G. Davis Committed by Russell King
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[ARM PATCH] 2324/1: Convert ARM proc files to use domain and pgtable manifest constants 

Patch from George G. Davis

Convert ARM proc files to use manifest constants defined in pgtable.h
and domain.h. This is a prelude to allow renumbering domains. The
domain renumbering is required to implement support for ARMv6 MMU
super sections where domain 0 is implied. Although this is technically
only required for ARMv6, it seemed reasonable to clean up all proc
files while here.

I did a test build with and without this patch applied and confirmed
that all proc file binaries are unchanged when this patch is applied.

Signed-off-by: George G. Davis
Signed-off-by: Russell King
parent 3188508a
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Inline Side-by-side
Showing with 211 additions and 43 deletions
arch/arm/mm/proc-arm1020.S
View file @ d94a27bf
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/constants.h> #include <asm/constants.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/hardware.h> #include <asm/hardware.h>
...@@ -432,7 +433,10 @@ __arm1020_setup: ...@@ -432,7 +433,10 @@ __arm1020_setup:
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
/* /*
...@@ -522,7 +526,9 @@ cpu_arm1020_name: ...@@ -522,7 +526,9 @@ cpu_arm1020_name:
__arm1020_proc_info: __arm1020_proc_info:
.long 0x4104a200 @ ARM 1020T (Architecture v5T) .long 0x4104a200 @ ARM 1020T (Architecture v5T)
.long 0xff0ffff0 .long 0xff0ffff0
.long 0x00000c02 @ mmuflags .long PMD_TYPE_SECT | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm1020_setup b __arm1020_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-arm1020e.S
View file @ d94a27bf
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/constants.h> #include <asm/constants.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/hardware.h> #include <asm/hardware.h>
...@@ -414,7 +415,11 @@ __arm1020e_setup: ...@@ -414,7 +415,11 @@ __arm1020e_setup:
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
/* /*
...@@ -504,7 +509,10 @@ cpu_arm1020e_name: ...@@ -504,7 +509,10 @@ cpu_arm1020e_name:
__arm1020e_proc_info: __arm1020e_proc_info:
.long 0x4105a200 @ ARM 1020TE (Architecture v5TE) .long 0x4105a200 @ ARM 1020TE (Architecture v5TE)
.long 0xff0ffff0 .long 0xff0ffff0
.long 0x00000c12 @ mmuflags .long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm1020e_setup b __arm1020e_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-arm1022.S
View file @ d94a27bf
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/constants.h> #include <asm/constants.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
...@@ -395,7 +396,10 @@ __arm1022_setup: ...@@ -395,7 +396,10 @@ __arm1022_setup:
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
/* /*
...@@ -485,7 +489,10 @@ cpu_arm1022_name: ...@@ -485,7 +489,10 @@ cpu_arm1022_name:
__arm1022_proc_info: __arm1022_proc_info:
.long 0x4105a220 @ ARM 1022E (v5TE) .long 0x4105a220 @ ARM 1022E (v5TE)
.long 0xff0ffff0 .long 0xff0ffff0
.long 0x00000c12 @ mmuflags .long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm1022_setup b __arm1022_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-arm1026.S
View file @ d94a27bf
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/constants.h> #include <asm/constants.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
...@@ -389,7 +390,10 @@ __arm1026_setup: ...@@ -389,7 +390,10 @@ __arm1026_setup:
mov r0, #4 @ explicitly disable writeback mov r0, #4 @ explicitly disable writeback
mcr p15, 7, r0, c15, c0, 0 mcr p15, 7, r0, c15, c0, 0
#endif #endif
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
/* /*
...@@ -480,7 +484,10 @@ cpu_arm1026_name: ...@@ -480,7 +484,10 @@ cpu_arm1026_name:
__arm1026_proc_info: __arm1026_proc_info:
.long 0x4106a260 @ ARM 1026EJ-S (v5TEJ) .long 0x4106a260 @ ARM 1026EJ-S (v5TEJ)
.long 0xff0ffff0 .long 0xff0ffff0
.long 0x00000c12 @ mmuflags .long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm1026_setup b __arm1026_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-arm6_7.S
View file @ d94a27bf
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/constants.h> #include <asm/constants.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
...@@ -254,7 +255,10 @@ __arm6_setup: mov r0, #0 ...@@ -254,7 +255,10 @@ __arm6_setup: mov r0, #0
mcr p15, 0, r0, c7, c0 @ flush caches on v3 mcr p15, 0, r0, c7, c0 @ flush caches on v3
mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 mcr p15, 0, r0, c5, c0 @ flush TLBs on v3
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mov r0, #0x3d @ . ..RS BLDP WCAM mov r0, #0x3d @ . ..RS BLDP WCAM
orr r0, r0, #0x100 @ . ..01 0011 1101 orr r0, r0, #0x100 @ . ..01 0011 1101
...@@ -266,7 +270,10 @@ __arm7_setup: mov r0, #0 ...@@ -266,7 +270,10 @@ __arm7_setup: mov r0, #0
mcr p15, 0, r0, c7, c0 @ flush caches on v3 mcr p15, 0, r0, c7, c0 @ flush caches on v3
mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 mcr p15, 0, r0, c5, c0 @ flush TLBs on v3
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_USER, DOMAIN_MANAGER))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mov r0, #0x7d @ . ..RS BLDP WCAM mov r0, #0x7d @ . ..RS BLDP WCAM
orr r0, r0, #0x100 @ . ..01 0111 1101 orr r0, r0, #0x100 @ . ..01 0111 1101
...@@ -391,7 +398,12 @@ __arm7_proc_info: ...@@ -391,7 +398,12 @@ __arm7_proc_info:
__arm710_proc_info: __arm710_proc_info:
.long 0x41007100 .long 0x41007100
.long 0xfff8ff00 .long 0xfff8ff00
.long 0x00000c1e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm7_setup b __arm7_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-arm720.S
View file @ d94a27bf
...@@ -35,6 +35,7 @@ ...@@ -35,6 +35,7 @@
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/constants.h> #include <asm/constants.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/hardware.h> #include <asm/hardware.h>
...@@ -131,7 +132,10 @@ __arm710_setup: mov r0, #0 ...@@ -131,7 +132,10 @@ __arm710_setup: mov r0, #0
mcr p15, 0, r0, c7, c7, 0 @ invalidate caches mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register mrc p15, 0, r0, c1, c0 @ get control register
...@@ -146,7 +150,10 @@ __arm720_setup: mov r0, #0 ...@@ -146,7 +150,10 @@ __arm720_setup: mov r0, #0
mcr p15, 0, r0, c7, c7, 0 @ invalidate caches mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register mrc p15, 0, r0, c1, c0 @ get control register
...@@ -206,7 +213,12 @@ cpu_arm720_name: ...@@ -206,7 +213,12 @@ cpu_arm720_name:
__arm710_proc_info: __arm710_proc_info:
.long 0x41807100 @ cpu_val .long 0x41807100 @ cpu_val
.long 0xffffff00 @ cpu_mask .long 0xffffff00 @ cpu_mask
.long 0x00000c1e @ section_mmu_flags .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm710_setup @ cpu_flush b __arm710_setup @ cpu_flush
.long cpu_arch_name @ arch_name .long cpu_arch_name @ arch_name
.long cpu_elf_name @ elf_name .long cpu_elf_name @ elf_name
...@@ -222,7 +234,12 @@ __arm710_proc_info: ...@@ -222,7 +234,12 @@ __arm710_proc_info:
__arm720_proc_info: __arm720_proc_info:
.long 0x41807200 @ cpu_val .long 0x41807200 @ cpu_val
.long 0xffffff00 @ cpu_mask .long 0xffffff00 @ cpu_mask
.long 0x00000c1e @ section_mmu_flags .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm720_setup @ cpu_flush b __arm720_setup @ cpu_flush
.long cpu_arch_name @ arch_name .long cpu_arch_name @ arch_name
.long cpu_elf_name @ elf_name .long cpu_elf_name @ elf_name
......
arch/arm/mm/proc-arm920.S
View file @ d94a27bf
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/page.h> #include <asm/page.h>
...@@ -383,7 +384,10 @@ __arm920_setup: ...@@ -383,7 +384,10 @@ __arm920_setup:
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
/* /*
...@@ -464,7 +468,12 @@ cpu_arm920_name: ...@@ -464,7 +468,12 @@ cpu_arm920_name:
__arm920_proc_info: __arm920_proc_info:
.long 0x41009200 .long 0x41009200
.long 0xff00fff0 .long 0xff00fff0
.long 0x00000c1e @ mmuflags .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm920_setup b __arm920_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-arm922.S
View file @ d94a27bf
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/page.h> #include <asm/page.h>
...@@ -387,7 +388,10 @@ __arm922_setup: ...@@ -387,7 +388,10 @@ __arm922_setup:
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
/* /*
...@@ -468,7 +472,12 @@ cpu_arm922_name: ...@@ -468,7 +472,12 @@ cpu_arm922_name:
__arm922_proc_info: __arm922_proc_info:
.long 0x41009220 .long 0x41009220
.long 0xff00fff0 .long 0xff00fff0
.long 0x00000c1e @ mmuflags .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm922_setup b __arm922_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-arm925.S
View file @ d94a27bf
...@@ -52,6 +52,7 @@ ...@@ -52,6 +52,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/page.h> #include <asm/page.h>
...@@ -446,7 +447,10 @@ __arm925_setup: ...@@ -446,7 +447,10 @@ __arm925_setup:
mcr p15, 7, r0, c15, c0, 0 mcr p15, 7, r0, c15, c0, 0
#endif #endif
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
/* /*
...@@ -536,7 +540,10 @@ cpu_arm925_name: ...@@ -536,7 +540,10 @@ cpu_arm925_name:
__arm925_proc_info: __arm925_proc_info:
.long 0x54029250 .long 0x54029250
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c12 @ mmuflags .long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm925_setup b __arm925_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -552,7 +559,10 @@ __arm925_proc_info: ...@@ -552,7 +559,10 @@ __arm925_proc_info:
__arm915_proc_info: __arm915_proc_info:
.long 0x54029150 .long 0x54029150
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c12 @ mmuflags .long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm925_setup b __arm925_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-arm926.S
View file @ d94a27bf
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/page.h> #include <asm/page.h>
...@@ -396,7 +397,10 @@ __arm926_setup: ...@@ -396,7 +397,10 @@ __arm926_setup:
mcr p15, 7, r0, c15, c0, 0 mcr p15, 7, r0, c15, c0, 0
#endif #endif
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
/* /*
...@@ -483,7 +487,12 @@ cpu_arm926_name: ...@@ -483,7 +487,12 @@ cpu_arm926_name:
__arm926_proc_info: __arm926_proc_info:
.long 0x41069260 @ ARM926EJ-S (v5TEJ) .long 0x41069260 @ ARM926EJ-S (v5TEJ)
.long 0xff0ffff0 .long 0xff0ffff0
.long 0x00000c1e @ mmuflags .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm926_setup b __arm926_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-sa110.S
View file @ d94a27bf
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
/* /*
...@@ -196,7 +197,10 @@ __sa110_setup: ...@@ -196,7 +197,10 @@ __sa110_setup:
mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4 mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4 mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mov r10, #0x1f @ Domains 0, 1 = client mov r10, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r10, c3, c0 @ load domain access register mcr p15, 0, r10, c3, c0 @ load domain access register
mov pc, lr mov pc, lr
.size __sa110_setup, . - __sa110_setup .size __sa110_setup, . - __sa110_setup
...@@ -245,7 +249,11 @@ cpu_sa110_name: ...@@ -245,7 +249,11 @@ cpu_sa110_name:
__sa110_proc_info: __sa110_proc_info:
.long 0x4401a100 .long 0x4401a100
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __sa110_setup b __sa110_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-sa1100.S
View file @ d94a27bf
...@@ -20,6 +20,7 @@ ...@@ -20,6 +20,7 @@
#include <linux/linkage.h> #include <linux/linkage.h>
#include <linux/init.h> #include <linux/init.h>
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/domain.h>
#include <asm/constants.h> #include <asm/constants.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/hardware.h> #include <asm/hardware.h>
...@@ -213,7 +214,10 @@ __sa1100_setup: ...@@ -213,7 +214,10 @@ __sa1100_setup:
mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4 mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4 mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0 @ load domain access register mcr p15, 0, r0, c3, c0 @ load domain access register
mcr p15, 0, r4, c2, c0 @ load page table pointer mcr p15, 0, r4, c2, c0 @ load page table pointer
mrc p15, 0, r0, c1, c0 @ get control register v4 mrc p15, 0, r0, c1, c0 @ get control register v4
...@@ -276,7 +280,11 @@ cpu_sa1110_name: ...@@ -276,7 +280,11 @@ cpu_sa1110_name:
__sa1100_proc_info: __sa1100_proc_info:
.long 0x4401a110 .long 0x4401a110
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __sa1100_setup b __sa1100_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -292,7 +300,11 @@ __sa1100_proc_info: ...@@ -292,7 +300,11 @@ __sa1100_proc_info:
__sa1110_proc_info: __sa1110_proc_info:
.long 0x6901b110 .long 0x6901b110
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __sa1100_setup b __sa1100_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-v6.S
View file @ d94a27bf
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <asm/constants.h> #include <asm/constants.h>
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include "proc-macros.S" #include "proc-macros.S"
...@@ -198,7 +199,10 @@ __v6_setup: ...@@ -198,7 +199,10 @@ __v6_setup:
mcr p15, 0, r10, c2, c0, 2 @ TTB control register mcr p15, 0, r10, c2, c0, 2 @ TTB control register
mcr p15, 0, r4, c2, c0, 0 @ load TTB0 mcr p15, 0, r4, c2, c0, 0 @ load TTB0
mcr p15, 0, r4, c2, c0, 1 @ load TTB1 mcr p15, 0, r4, c2, c0, 1 @ load TTB1
mov r10, #0x1f @ domains 0, 1 = manager mov r10, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r10, c3, c0, 0 @ load domain access register mcr p15, 0, r10, c3, c0, 0 @ load domain access register
mrc p15, 0, r0, c1, c0, 0 @ read control register mrc p15, 0, r0, c1, c0, 0 @ read control register
#ifdef CONFIG_VFP #ifdef CONFIG_VFP
...@@ -257,7 +261,11 @@ cpu_elf_name: ...@@ -257,7 +261,11 @@ cpu_elf_name:
__v6_proc_info: __v6_proc_info:
.long 0x0007b000 .long 0x0007b000
.long 0x0007f000 .long 0x0007f000
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __v6_setup b __v6_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
arch/arm/mm/proc-xscale.S
View file @ d94a27bf
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
#include <asm/procinfo.h> #include <asm/procinfo.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/domain.h>
#include <asm/page.h> #include <asm/page.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include "proc-macros.S" #include "proc-macros.S"
...@@ -600,7 +601,10 @@ __xscale_setup: ...@@ -600,7 +601,10 @@ __xscale_setup:
mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
mcr p15, 0, ip, c8, c7, 0 @ invalidate I, D TLBs mcr p15, 0, ip, c8, c7, 0 @ invalidate I, D TLBs
mcr p15, 0, r4, c2, c0, 0 @ load page table pointer mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
mov r0, #0x1f @ Domains 0, 1 = client mov r0, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT))
mcr p15, 0, r0, c3, c0, 0 @ load domain access register mcr p15, 0, r0, c3, c0, 0 @ load domain access register
#ifdef CONFIG_IWMMXT #ifdef CONFIG_IWMMXT
mov r0, #0 @ initially disallow access to CP0/CP1 mov r0, #0 @ initially disallow access to CP0/CP1
...@@ -712,7 +716,11 @@ cpu_pxa270_name: ...@@ -712,7 +716,11 @@ cpu_pxa270_name:
__80200_proc_info: __80200_proc_info:
.long 0x69052000 .long 0x69052000
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -728,7 +736,11 @@ __80200_proc_info: ...@@ -728,7 +736,11 @@ __80200_proc_info:
__8032x_proc_info: __8032x_proc_info:
.long 0x69052420 .long 0x69052420
.long 0xfffff5e0 @ mask should accomodate IOP80219 also .long 0xfffff5e0 @ mask should accomodate IOP80219 also
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -744,7 +756,11 @@ __8032x_proc_info: ...@@ -744,7 +756,11 @@ __8032x_proc_info:
__8033x_proc_info: __8033x_proc_info:
.long 0x69054090 .long 0x69054090
.long 0xffffffb0 .long 0xffffffb0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -760,7 +776,11 @@ __8033x_proc_info: ...@@ -760,7 +776,11 @@ __8033x_proc_info:
__pxa250_proc_info: __pxa250_proc_info:
.long 0x69052100 .long 0x69052100
.long 0xfffff7f0 .long 0xfffff7f0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -776,7 +796,11 @@ __pxa250_proc_info: ...@@ -776,7 +796,11 @@ __pxa250_proc_info:
__pxa210_proc_info: __pxa210_proc_info:
.long 0x69052120 .long 0x69052120
.long 0xfffff3f0 .long 0xfffff3f0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -792,7 +816,11 @@ __pxa210_proc_info: ...@@ -792,7 +816,11 @@ __pxa210_proc_info:
__ixp2400_proc_info: __ixp2400_proc_info:
.long 0x69054190 .long 0x69054190
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -808,7 +836,11 @@ __ixp2400_proc_info: ...@@ -808,7 +836,11 @@ __ixp2400_proc_info:
__ixp2800_proc_info: __ixp2800_proc_info:
.long 0x690541a0 .long 0x690541a0
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -824,7 +856,11 @@ __ixp2800_proc_info: ...@@ -824,7 +856,11 @@ __ixp2800_proc_info:
__ixp42x_proc_info: __ixp42x_proc_info:
.long 0x690541c0 .long 0x690541c0
.long 0xffffffc0 .long 0xffffffc0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -856,7 +892,11 @@ __ixp46x_proc_info: ...@@ -856,7 +892,11 @@ __ixp46x_proc_info:
__pxa255_proc_info: __pxa255_proc_info:
.long 0x69052d00 .long 0x69052d00
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
...@@ -872,7 +912,11 @@ __pxa255_proc_info: ...@@ -872,7 +912,11 @@ __pxa255_proc_info:
__pxa270_proc_info: __pxa270_proc_info:
.long 0x69054110 .long 0x69054110
.long 0xfffffff0 .long 0xfffffff0
.long 0x00000c0e .long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup b __xscale_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
......
include/asm-arm/domain.h
View file @ d94a27bf
...@@ -29,8 +29,9 @@ ...@@ -29,8 +29,9 @@
#define DOMAIN_CLIENT 1 #define DOMAIN_CLIENT 1
#define DOMAIN_MANAGER 3 #define DOMAIN_MANAGER 3
#define domain_val(dom,type) ((type) << 2*(dom)) #define domain_val(dom,type) ((type) << (2*(dom)))
#ifndef __ASSEMBLY__
#define set_domain(x) \ #define set_domain(x) \
do { \ do { \
__asm__ __volatile__( \ __asm__ __volatile__( \
...@@ -48,3 +49,4 @@ ...@@ -48,3 +49,4 @@
} while (0) } while (0)
#endif #endif
#endif /* !__ASSEMBLY__ */
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