Commit daf9713c authored by Ludovic Barre's avatar Ludovic Barre Committed by Ulf Hansson

mmc: mmci: expand startbiterr to irqmask and error check

All variants don't pretend to have a startbiterr.
-While data error check, if status register return an error
(like  MCI_DATACRCFAIL) we must avoid to check MCI_STARTBITERR
(if not desired).
-expand start_err to MCI_IRQENABLE to avoid to set this bit by default.
Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent c931d495
...@@ -1042,14 +1042,18 @@ static void ...@@ -1042,14 +1042,18 @@ static void
mmci_data_irq(struct mmci_host *host, struct mmc_data *data, mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
unsigned int status) unsigned int status)
{ {
unsigned int status_err;
/* Make sure we have data to handle */ /* Make sure we have data to handle */
if (!data) if (!data)
return; return;
/* First check for errors */ /* First check for errors */
if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT | status_err = status & (host->variant->start_err |
host->variant->start_err | MCI_DATACRCFAIL | MCI_DATATIMEOUT |
MCI_TXUNDERRUN | MCI_RXOVERRUN)) { MCI_TXUNDERRUN | MCI_RXOVERRUN);
if (status_err) {
u32 remain, success; u32 remain, success;
/* Terminate the DMA transfer */ /* Terminate the DMA transfer */
...@@ -1066,18 +1070,18 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, ...@@ -1066,18 +1070,18 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
success = data->blksz * data->blocks - remain; success = data->blksz * data->blocks - remain;
dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n",
status, success); status_err, success);
if (status & MCI_DATACRCFAIL) { if (status_err & MCI_DATACRCFAIL) {
/* Last block was not successful */ /* Last block was not successful */
success -= 1; success -= 1;
data->error = -EILSEQ; data->error = -EILSEQ;
} else if (status & MCI_DATATIMEOUT) { } else if (status_err & MCI_DATATIMEOUT) {
data->error = -ETIMEDOUT; data->error = -ETIMEDOUT;
} else if (status & MCI_STARTBITERR) { } else if (status_err & MCI_STARTBITERR) {
data->error = -ECOMM; data->error = -ECOMM;
} else if (status & MCI_TXUNDERRUN) { } else if (status_err & MCI_TXUNDERRUN) {
data->error = -EIO; data->error = -EIO;
} else if (status & MCI_RXOVERRUN) { } else if (status_err & MCI_RXOVERRUN) {
if (success > host->variant->fifosize) if (success > host->variant->fifosize)
success -= host->variant->fifosize; success -= host->variant->fifosize;
else else
...@@ -1918,7 +1922,7 @@ static int mmci_probe(struct amba_device *dev, ...@@ -1918,7 +1922,7 @@ static int mmci_probe(struct amba_device *dev,
goto clk_disable; goto clk_disable;
} }
writel(MCI_IRQENABLE, host->base + MMCIMASK0); writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0);
amba_set_drvdata(dev, mmc); amba_set_drvdata(dev, mmc);
...@@ -2005,7 +2009,8 @@ static void mmci_restore(struct mmci_host *host) ...@@ -2005,7 +2009,8 @@ static void mmci_restore(struct mmci_host *host)
writel(host->datactrl_reg, host->base + MMCIDATACTRL); writel(host->datactrl_reg, host->base + MMCIDATACTRL);
writel(host->pwr_reg, host->base + MMCIPOWER); writel(host->pwr_reg, host->base + MMCIPOWER);
} }
writel(MCI_IRQENABLE, host->base + MMCIMASK0); writel(MCI_IRQENABLE | host->variant->start_err,
host->base + MMCIMASK0);
mmci_reg_delay(host); mmci_reg_delay(host);
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
......
...@@ -181,9 +181,9 @@ ...@@ -181,9 +181,9 @@
#define MMCIFIFO 0x080 /* to 0x0bc */ #define MMCIFIFO 0x080 /* to 0x0bc */
#define MCI_IRQENABLE \ #define MCI_IRQENABLE \
(MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \ (MCI_CMDCRCFAILMASK | MCI_DATACRCFAILMASK | MCI_CMDTIMEOUTMASK | \
MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ MCI_DATATIMEOUTMASK | MCI_TXUNDERRUNMASK | MCI_RXOVERRUNMASK | \
MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_STARTBITERRMASK) MCI_CMDRESPENDMASK | MCI_CMDSENTMASK)
/* These interrupts are directed to IRQ1 when two IRQ lines are available */ /* These interrupts are directed to IRQ1 when two IRQ lines are available */
#define MCI_IRQ1MASK \ #define MCI_IRQ1MASK \
......
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