ath9k_hw: Fix false tx hung detection in AR9003 chips
The edma based (AR9003 family) chips update tx status descriptors in a common ring buffer for all transmitted frames. Whenever tx interrupt is raised, the descriptors are processed and tx status index is moved. The complete tx stauts ring are updated with beacons tx status when there are no data frames to be sent for a period of time. In this state, transmitting data frames causes the driver to wait for the tx status on an incorrect tx status index though the status was updated by hw properly. The driver detects this condition as a h/w hang and does unnecessary chip resets. This issue was orginally reported in adhoc mode while sending frames after an idle time. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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