Commit dd149c52 authored by Yuan Mu's avatar Yuan Mu Committed by Greg Kroah-Hartman

[PATCH] hwmon: W83627THF VID fixes

This patch fixes the VID reading; no cpu0_vid and vrm files created if
the chip is w83627thf and GPIO5 not enabled.
Signed-off-by: default avatarYuan Mu <ymu@winbond.com.tw>
Signed-off-by: default avatarJean Delvare <khali@linux-fr.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 9c516ef4
...@@ -1122,11 +1122,10 @@ static int w83627hf_detect(struct i2c_adapter *adapter) ...@@ -1122,11 +1122,10 @@ static int w83627hf_detect(struct i2c_adapter *adapter)
if (kind != w83697hf) if (kind != w83697hf)
device_create_file_temp(new_client, 3); device_create_file_temp(new_client, 3);
if (kind != w83697hf) if (kind != w83697hf && data->vid != 0xff) {
device_create_file_vid(new_client); device_create_file_vid(new_client);
if (kind != w83697hf)
device_create_file_vrm(new_client); device_create_file_vrm(new_client);
}
device_create_file_fan_div(new_client, 1); device_create_file_fan_div(new_client, 1);
device_create_file_fan_div(new_client, 2); device_create_file_fan_div(new_client, 2);
...@@ -1232,7 +1231,7 @@ static int w83627thf_read_gpio5(struct i2c_client *client) ...@@ -1232,7 +1231,7 @@ static int w83627thf_read_gpio5(struct i2c_client *client)
/* Make sure the pins are configured for input /* Make sure the pins are configured for input
There must be at least five (VRM 9), and possibly 6 (VRM 10) */ There must be at least five (VRM 9), and possibly 6 (VRM 10) */
sel = superio_inb(W83627THF_GPIO5_IOSR); sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
if ((sel & 0x1f) != 0x1f) { if ((sel & 0x1f) != 0x1f) {
dev_dbg(&client->dev, "GPIO5 not configured for VID " dev_dbg(&client->dev, "GPIO5 not configured for VID "
"function\n"); "function\n");
...@@ -1323,19 +1322,18 @@ static void w83627hf_init_client(struct i2c_client *client) ...@@ -1323,19 +1322,18 @@ static void w83627hf_init_client(struct i2c_client *client)
int hi = w83627hf_read_value(client, W83781D_REG_CHIPID); int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
} else if (w83627thf == data->type) { } else if (w83627thf == data->type) {
data->vid = w83627thf_read_gpio5(client) & 0x3f; data->vid = w83627thf_read_gpio5(client);
} }
/* Read VRM & OVT Config only once */ /* Read VRM & OVT Config only once */
if (w83627thf == data->type || w83637hf == data->type) { if (w83627thf == data->type || w83637hf == data->type) {
data->vrm_ovt = data->vrm_ovt =
w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG); w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
} else {
/* Convert VID to voltage based on default VRM */
data->vrm = vid_which_vrm();
} }
/* Convert VID to voltage based on VRM */
data->vrm = vid_which_vrm();
tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
for (i = 1; i <= 3; i++) { for (i = 1; i <= 3; i++) {
if (!(tmp & BIT_SCFG1[i - 1])) { if (!(tmp & BIT_SCFG1[i - 1])) {
......
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