Commit dd851084 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'amlogic-dt64-redo' of...

Merge tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64

Amlogic 64-bit DT updates for v4.12
- pinctrl: new pins for audio
- clocks: more clocks exposed for GFX, audio
- new board: Khadas Vim (S905X)
- new board: HwaCom AmazeTV (S905X)
- ethernet phy: add GPIO resets

* tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (41 commits)
  ARM64: dts: meson-gx: Add support for HDMI output
  ARM64: dts: meson-gx: Add shared CMA dma memory pool
  ARM64: dts: meson-gxbb-odroidc2: Enable SARADC node
  dt-bindings: clock: gxbb-clkc: Add GXL compatible variant
  clk: meson-gxbb: Expose GP0 dt-bindings clock id
  clk: meson-gxbb: Add MALI clock IDS
  dt-bindings: clk: gxbb: expose i2s output clock gates
  ARM64: dts: meson-gxl: add spdif output pins
  ARM64: dts: meson-gxl: add i2s output pins
  ARM64: dts: meson-gxbb: add spdif output pins
  ARM64: dts: meson-gxbb: add i2s output pins
  ARM64: dts: meson-gxbb: Add USB Hub GPIO hog
  ARM: dts: meson8b: Add gpio-ranges properties
  ARM: dts: meson8: Add gpio-ranges properties
  ARM64: dts: meson-gxl: Add gpio-ranges properties
  ARM64: dts: meson-gxbb: Add gpio-ranges properties
  ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL
  ARM64: dts: meson-gxl: Add missing pinctrl pins groups
  ARM64: dts: meson-gx: Prepend GX generic compatible like other nodes
  ARM64: dts: meson-gx: empty line cleanup
  ...
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 9720a9a3 b2121170
...@@ -43,8 +43,11 @@ Board compatible values: ...@@ -43,8 +43,11 @@ Board compatible values:
- "wetek,hub" (Meson gxbb) - "wetek,hub" (Meson gxbb)
- "wetek,play2" (Meson gxbb) - "wetek,play2" (Meson gxbb)
- "amlogic,p212" (Meson gxl s905x) - "amlogic,p212" (Meson gxl s905x)
- "khadas,vim" (Meson gxl s905x)
- "amlogic,p230" (Meson gxl s905d) - "amlogic,p230" (Meson gxl s905d)
- "amlogic,p231" (Meson gxl s905d) - "amlogic,p231" (Meson gxl s905d)
- "hwacom,amazetv" (Meson gxl s905x)
- "amlogic,q200" (Meson gxm s912) - "amlogic,q200" (Meson gxm s912)
- "amlogic,q201" (Meson gxm s912) - "amlogic,q201" (Meson gxm s912)
- "nexbox,a95x" (Meson gxbb or Meson gxl s905x) - "nexbox,a95x" (Meson gxbb or Meson gxl s905x)
......
...@@ -5,7 +5,8 @@ controllers within the SoC. ...@@ -5,7 +5,8 @@ controllers within the SoC.
Required Properties: Required Properties:
- compatible: should be "amlogic,gxbb-clkc" - compatible: should be "amlogic,gxbb-clkc" for GXBB SoC,
or "amlogic,gxl-clkc" for GXL and GXM SoC.
- reg: physical base address of the clock controller and length of memory - reg: physical base address of the clock controller and length of memory
mapped region. mapped region.
......
...@@ -136,6 +136,7 @@ holt Holt Integrated Circuits, Inc. ...@@ -136,6 +136,7 @@ holt Holt Integrated Circuits, Inc.
honeywell Honeywell honeywell Honeywell
hp Hewlett Packard hp Hewlett Packard
holtek Holtek Semiconductor, Inc. holtek Holtek Semiconductor, Inc.
hwacom HwaCom Systems Inc.
i2se I2SE GmbH i2se I2SE GmbH
ibm International Business Machines (IBM) ibm International Business Machines (IBM)
idt Integrated Device Technologies, Inc. idt Integrated Device Technologies, Inc.
...@@ -159,6 +160,7 @@ jedec JEDEC Solid State Technology Association ...@@ -159,6 +160,7 @@ jedec JEDEC Solid State Technology Association
karo Ka-Ro electronics GmbH karo Ka-Ro electronics GmbH
keithkoep Keith & Koep GmbH keithkoep Keith & Koep GmbH
keymile Keymile GmbH keymile Keymile GmbH
khadas Khadas
kinetic Kinetic Technologies kinetic Kinetic Technologies
kosagi Sutajio Ko-Usagi PTE Ltd. kosagi Sutajio Ko-Usagi PTE Ltd.
kyo Kyocera Corporation kyo Kyocera Corporation
......
...@@ -106,6 +106,7 @@ gpio: banks@c11080b0 { ...@@ -106,6 +106,7 @@ gpio: banks@c11080b0 {
reg-names = "mux", "pull", "pull-enable", "gpio"; reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pinctrl_cbus 0 0 120>;
}; };
spi_nor_pins: nor { spi_nor_pins: nor {
...@@ -148,6 +149,7 @@ gpio_ao: ao-bank@c1108030 { ...@@ -148,6 +149,7 @@ gpio_ao: ao-bank@c1108030 {
reg-names = "mux", "pull", "gpio"; reg-names = "mux", "pull", "gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pinctrl_aobus 0 120 16>;
}; };
uart_ao_a_pins: uart_ao_a { uart_ao_a_pins: uart_ao_a {
......
...@@ -198,6 +198,7 @@ gpio: banks@c11080b0 { ...@@ -198,6 +198,7 @@ gpio: banks@c11080b0 {
reg-names = "mux", "pull", "pull-enable", "gpio"; reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pinctrl_cbus 0 0 130>;
}; };
}; };
...@@ -215,6 +216,7 @@ gpio_ao: ao-bank@c1108030 { ...@@ -215,6 +216,7 @@ gpio_ao: ao-bank@c1108030 {
reg-names = "mux", "pull", "gpio"; reg-names = "mux", "pull", "gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pinctrl_aobus 0 130 16>;
}; };
uart_ao_a_pins: uart_ao_a { uart_ao_a_pins: uart_ao_a {
......
...@@ -7,9 +7,11 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-meta.dtb ...@@ -7,9 +7,11 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-meta.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-khadas-vim.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-hwacom-amazetv.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
......
...@@ -98,6 +98,27 @@ sdio_pwrseq: sdio-pwrseq { ...@@ -98,6 +98,27 @@ sdio_pwrseq: sdio-pwrseq {
clocks = <&wifi32k>; clocks = <&wifi32k>;
clock-names = "ext_clock"; clock-names = "ext_clock";
}; };
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
}; };
/* This UART is brought out to the DB9 connector */ /* This UART is brought out to the DB9 connector */
...@@ -188,3 +209,21 @@ &pwm_ef { ...@@ -188,3 +209,21 @@ &pwm_ef {
&ethmac { &ethmac {
status = "okay"; status = "okay";
}; };
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
...@@ -71,6 +71,14 @@ secmon_reserved: secmon@10000000 { ...@@ -71,6 +71,14 @@ secmon_reserved: secmon@10000000 {
reg = <0x0 0x10000000 0x0 0x200000>; reg = <0x0 0x10000000 0x0 0x200000>;
no-map; no-map;
}; };
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0xbc00000>;
alignment = <0x0 0x400000>;
linux,cma-default;
};
}; };
cpus { cpus {
...@@ -233,7 +241,7 @@ uart_B: serial@84dc { ...@@ -233,7 +241,7 @@ uart_B: serial@84dc {
}; };
i2c_A: i2c@8500 { i2c_A: i2c@8500 {
compatible = "amlogic,meson-gxbb-i2c"; compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
reg = <0x0 0x08500 0x0 0x20>; reg = <0x0 0x08500 0x0 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>; #address-cells = <1>;
...@@ -279,7 +287,7 @@ uart_C: serial@8700 { ...@@ -279,7 +287,7 @@ uart_C: serial@8700 {
}; };
i2c_B: i2c@87c0 { i2c_B: i2c@87c0 {
compatible = "amlogic,meson-gxbb-i2c"; compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087c0 0x0 0x20>; reg = <0x0 0x087c0 0x0 0x20>;
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>; #address-cells = <1>;
...@@ -288,7 +296,7 @@ i2c_B: i2c@87c0 { ...@@ -288,7 +296,7 @@ i2c_B: i2c@87c0 {
}; };
i2c_C: i2c@87e0 { i2c_C: i2c@87e0 {
compatible = "amlogic,meson-gxbb-i2c"; compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087e0 0x0 0x20>; reg = <0x0 0x087e0 0x0 0x20>;
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>; #address-cells = <1>;
...@@ -296,6 +304,14 @@ i2c_C: i2c@87e0 { ...@@ -296,6 +304,14 @@ i2c_C: i2c@87e0 {
status = "disabled"; status = "disabled";
}; };
spifc: spi@8c80 {
compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
reg = <0x0 0x08c80 0x0 0x80>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
watchdog@98d0 { watchdog@98d0 {
compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt"; compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
reg = <0x0 0x098d0 0x0 0x10>; reg = <0x0 0x098d0 0x0 0x10>;
...@@ -317,7 +333,7 @@ gic: interrupt-controller@c4301000 { ...@@ -317,7 +333,7 @@ gic: interrupt-controller@c4301000 {
}; };
sram: sram@c8000000 { sram: sram@c8000000 {
compatible = "amlogic,meson-gxbb-sram", "mmio-sram"; compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
reg = <0x0 0xc8000000 0x0 0x14000>; reg = <0x0 0xc8000000 0x0 0x14000>;
#address-cells = <1>; #address-cells = <1>;
...@@ -325,12 +341,12 @@ sram: sram@c8000000 { ...@@ -325,12 +341,12 @@ sram: sram@c8000000 {
ranges = <0 0x0 0xc8000000 0x14000>; ranges = <0 0x0 0xc8000000 0x14000>;
cpu_scp_lpri: scp-shmem@0 { cpu_scp_lpri: scp-shmem@0 {
compatible = "amlogic,meson-gxbb-scp-shmem"; compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
reg = <0x13000 0x400>; reg = <0x13000 0x400>;
}; };
cpu_scp_hpri: scp-shmem@200 { cpu_scp_hpri: scp-shmem@200 {
compatible = "amlogic,meson-gxbb-scp-shmem"; compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
reg = <0x13400 0x400>; reg = <0x13400 0x400>;
}; };
}; };
...@@ -342,6 +358,13 @@ aobus: aobus@c8100000 { ...@@ -342,6 +358,13 @@ aobus: aobus@c8100000 {
#size-cells = <2>; #size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
clkc_AO: clock-controller@040 {
compatible = "amlogic,gx-aoclkc", "amlogic,gxbb-aoclkc";
reg = <0x0 0x00040 0x0 0x4>;
#clock-cells = <1>;
#reset-cells = <1>;
};
uart_AO: serial@4c0 { uart_AO: serial@4c0 {
compatible = "amlogic,meson-uart"; compatible = "amlogic,meson-uart";
reg = <0x0 0x004c0 0x0 0x14>; reg = <0x0 0x004c0 0x0 0x14>;
...@@ -358,6 +381,15 @@ uart_AO_B: serial@4e0 { ...@@ -358,6 +381,15 @@ uart_AO_B: serial@4e0 {
status = "disabled"; status = "disabled";
}; };
i2c_AO: i2c@500 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
reg = <0x0 0x500 0x0 0x20>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pwm_AO_ab: pwm@550 { pwm_AO_ab: pwm@550 {
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
reg = <0x0 0x00550 0x0 0x10>; reg = <0x0 0x00550 0x0 0x10>;
...@@ -366,7 +398,7 @@ pwm_AO_ab: pwm@550 { ...@@ -366,7 +398,7 @@ pwm_AO_ab: pwm@550 {
}; };
ir: ir@580 { ir: ir@580 {
compatible = "amlogic,meson-gxbb-ir"; compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
reg = <0x0 0x00580 0x0 0x40>; reg = <0x0 0x00580 0x0 0x40>;
interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
status = "disabled"; status = "disabled";
...@@ -386,7 +418,6 @@ rng { ...@@ -386,7 +418,6 @@ rng {
}; };
}; };
hiubus: hiubus@c883c000 { hiubus: hiubus@c883c000 {
compatible = "simple-bus"; compatible = "simple-bus";
reg = <0x0 0xc883c000 0x0 0x2000>; reg = <0x0 0xc883c000 0x0 0x2000>;
...@@ -410,7 +441,6 @@ ethmac: ethernet@c9410000 { ...@@ -410,7 +441,6 @@ ethmac: ethernet@c9410000 {
0x0 0xc8834540 0x0 0x4>; 0x0 0xc8834540 0x0 0x4>;
interrupts = <0 8 1>; interrupts = <0 8 1>;
interrupt-names = "macirq"; interrupt-names = "macirq";
phy-mode = "rgmii";
status = "disabled"; status = "disabled";
}; };
...@@ -457,6 +487,38 @@ vpu: vpu@d0100000 { ...@@ -457,6 +487,38 @@ vpu: vpu@d0100000 {
cvbs_vdac_port: port@0 { cvbs_vdac_port: port@0 {
reg = <0>; reg = <0>;
}; };
/* HDMI-TX output port */
hdmi_tx_port: port@1 {
reg = <1>;
hdmi_tx_out: endpoint {
remote-endpoint = <&hdmi_tx_in>;
};
};
};
hdmi_tx: hdmi-tx@c883a000 {
compatible = "amlogic,meson-gx-dw-hdmi";
reg = <0x0 0xc883a000 0x0 0x1c>;
interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
/* VPU VENC Input */
hdmi_tx_venc_port: port@0 {
reg = <0>;
hdmi_tx_in: endpoint {
remote-endpoint = <&hdmi_tx_out>;
};
};
/* TMDS Output */
hdmi_tx_tmds_port: port@1 {
reg = <1>;
};
}; };
}; };
}; };
...@@ -152,6 +152,17 @@ cvbs_connector_in: endpoint { ...@@ -152,6 +152,17 @@ cvbs_connector_in: endpoint {
}; };
}; };
}; };
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
}; };
&uart_AO { &uart_AO {
...@@ -164,7 +175,24 @@ &ethmac { ...@@ -164,7 +175,24 @@ &ethmac {
status = "okay"; status = "okay";
pinctrl-0 = <&eth_rmii_pins>; pinctrl-0 = <&eth_rmii_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rmii"; phy-mode = "rmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* IC Plus IP101GR (0x02430c54) */
reg = <0>;
};
};
}; };
&ir { &ir {
...@@ -245,3 +273,15 @@ cvbs_vdac_out: endpoint { ...@@ -245,3 +273,15 @@ cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>; remote-endpoint = <&cvbs_connector_in>;
}; };
}; };
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
...@@ -96,7 +96,7 @@ tflash_vdd: regulator-tflash_vdd { ...@@ -96,7 +96,7 @@ tflash_vdd: regulator-tflash_vdd {
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
gpio = <&gpio_ao GPIOAO_12 GPIO_ACTIVE_HIGH>; gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
}; };
...@@ -152,6 +152,13 @@ &ethmac { ...@@ -152,6 +152,13 @@ &ethmac {
pinctrl-0 = <&eth_rgmii_pins>; pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
phy-handle = <&eth_phy0>; phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
amlogic,tx-delay-ns = <2>;
mdio { mdio {
compatible = "snps,dwmac-mdio"; compatible = "snps,dwmac-mdio";
...@@ -165,6 +172,57 @@ eth_phy0: ethernet-phy@0 { ...@@ -165,6 +172,57 @@ eth_phy0: ethernet-phy@0 {
}; };
}; };
&pinctrl_aobus {
gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
"USB HUB nRESET", "USB OTG Power En",
"J7 Header Pin2", "IR In", "J7 Header Pin4",
"J7 Header Pin6", "J7 Header Pin5", "J7 Header Pin7",
"HDMI CEC", "SYS LED";
};
&pinctrl_periphs {
gpio-line-names = /* Bank GPIOZ */
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
"Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
"Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
"Eth PHY nRESET", "Eth PHY Intc",
/* Bank GPIOH */
"HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
/* Bank BOOT */
"eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
"eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
"eMMC Reset", "eMMC CMD",
"", "", "", "", "", "", "",
/* Bank CARD */
"SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
"SDCard D3", "SDCard D2", "SDCard Det",
/* Bank GPIODV */
"", "", "", "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "", "",
"I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
"PWM D", "PWM B",
/* Bank GPIOY */
"Revision Bit0", "Revision Bit1", "",
"J2 Header Pin35", "", "", "", "J2 Header Pin36",
"J2 Header Pin31", "", "", "", "TF VDD En",
"J2 Header Pin32", "J2 Header Pin26", "", "",
/* Bank GPIOX */
"J2 Header Pin29", "J2 Header Pin24",
"J2 Header Pin23", "J2 Header Pin22",
"J2 Header Pin21", "J2 Header Pin18",
"J2 Header Pin33", "J2 Header Pin19",
"J2 Header Pin16", "J2 Header Pin15",
"J2 Header Pin12", "J2 Header Pin13",
"J2 Header Pin8", "J2 Header Pin10",
"", "", "", "", "",
"J2 Header Pin11", "", "J2 Header Pin7",
/* Bank GPIOCLK */
"", "", "", "",
/* GPIO_TEST_N */
"";
};
&ir { &ir {
status = "okay"; status = "okay";
pinctrl-0 = <&remote_input_ao_pins>; pinctrl-0 = <&remote_input_ao_pins>;
...@@ -177,6 +235,21 @@ &i2c_A { ...@@ -177,6 +235,21 @@ &i2c_A {
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&gpio_ao {
/*
* WARNING: The USB Hub on the Odroid-C2 needs a reset signal
* to be turned high in order to be detected by the USB Controller
* This signal should be handled by a USB specific power sequence
* in order to reset the Hub when USB bus is powered down.
*/
usb-hub {
gpio-hog;
gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb-hub-reset";
};
};
&usb0_phy { &usb0_phy {
status = "okay"; status = "okay";
phy-supply = <&usb_otg_pwr>; phy-supply = <&usb_otg_pwr>;
...@@ -194,6 +267,11 @@ &usb1 { ...@@ -194,6 +267,11 @@ &usb1 {
status = "okay"; status = "okay";
}; };
&saradc {
status = "okay";
vref-supply = <&vcc1v8>;
};
/* SD */ /* SD */
&sd_emmc_b { &sd_emmc_b {
status = "okay"; status = "okay";
......
...@@ -96,6 +96,31 @@ button-menu { ...@@ -96,6 +96,31 @@ button-menu {
}; };
}; };
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@3 {
/* Micrel KSZ9031 (0x00221620) */
reg = <3>;
};
};
};
&i2c_B { &i2c_B {
status = "okay"; status = "okay";
pinctrl-0 = <&i2c_b_pins>; pinctrl-0 = <&i2c_b_pins>;
......
...@@ -50,3 +50,14 @@ / { ...@@ -50,3 +50,14 @@ / {
compatible = "amlogic,p201", "amlogic,meson-gxbb"; compatible = "amlogic,p201", "amlogic,meson-gxbb";
model = "Amlogic Meson GXBB P201 Development Board"; model = "Amlogic Meson GXBB P201 Development Board";
}; };
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rmii_pins>;
pinctrl-names = "default";
phy-mode = "rmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
};
...@@ -135,6 +135,17 @@ cvbs_connector_in: endpoint { ...@@ -135,6 +135,17 @@ cvbs_connector_in: endpoint {
}; };
}; };
}; };
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
}; };
/* This UART is brought out to the DB9 connector */ /* This UART is brought out to the DB9 connector */
...@@ -144,12 +155,6 @@ &uart_AO { ...@@ -144,12 +155,6 @@ &uart_AO {
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
};
&ir { &ir {
status = "okay"; status = "okay";
pinctrl-0 = <&remote_input_ao_pins>; pinctrl-0 = <&remote_input_ao_pins>;
...@@ -250,3 +255,15 @@ cvbs_vdac_out: endpoint { ...@@ -250,3 +255,15 @@ cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>; remote-endpoint = <&cvbs_connector_in>;
}; };
}; };
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
...@@ -115,7 +115,6 @@ &uart_AO { ...@@ -115,7 +115,6 @@ &uart_AO {
status = "okay"; status = "okay";
pinctrl-0 = <&uart_ao_a_pins>; pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&ir { &ir {
...@@ -128,6 +127,26 @@ &ethmac { ...@@ -128,6 +127,26 @@ &ethmac {
status = "okay"; status = "okay";
pinctrl-0 = <&eth_rgmii_pins>; pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
};
};
}; };
&usb0_phy { &usb0_phy {
......
...@@ -64,3 +64,29 @@ cvbs-connector { ...@@ -64,3 +64,29 @@ cvbs-connector {
status = "disabled"; status = "disabled";
}; };
}; };
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
};
};
};
...@@ -87,6 +87,32 @@ button@0 { ...@@ -87,6 +87,32 @@ button@0 {
}; };
}; };
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
};
};
};
&i2c_A { &i2c_A {
status = "okay"; status = "okay";
pinctrl-0 = <&i2c_a_pins>; pinctrl-0 = <&i2c_a_pins>;
......
...@@ -97,17 +97,6 @@ usb1: usb@c9100000 { ...@@ -97,17 +97,6 @@ usb1: usb@c9100000 {
}; };
}; };
&cbus {
spifc: spi@8c80 {
compatible = "amlogic,meson-gxbb-spifc";
reg = <0x0 0x08c80 0x0 0x80>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_SPI>;
status = "disabled";
};
};
&ethmac { &ethmac {
clocks = <&clkc CLKID_ETH>, clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>, <&clkc CLKID_FCLK_DIV2>,
...@@ -129,6 +118,7 @@ gpio_ao: bank@14 { ...@@ -129,6 +118,7 @@ gpio_ao: bank@14 {
reg-names = "mux", "pull", "gpio"; reg-names = "mux", "pull", "gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pinctrl_aobus 0 0 14>;
}; };
uart_ao_a_pins: uart_ao_a { uart_ao_a_pins: uart_ao_a {
...@@ -203,30 +193,62 @@ mux { ...@@ -203,30 +193,62 @@ mux {
function = "pwm_ao_b"; function = "pwm_ao_b";
}; };
}; };
};
clkc_AO: clock-controller@040 { i2s_am_clk_pins: i2s_am_clk {
compatible = "amlogic,gxbb-aoclkc"; mux {
reg = <0x0 0x00040 0x0 0x4>; groups = "i2s_am_clk";
#clock-cells = <1>; function = "i2s_out_ao";
#reset-cells = <1>; };
}; };
pwm_ab_AO: pwm@550 { i2s_out_ao_clk_pins: i2s_out_ao_clk {
compatible = "amlogic,meson-gxbb-pwm"; mux {
reg = <0x0 0x0550 0x0 0x10>; groups = "i2s_out_ao_clk";
#pwm-cells = <3>; function = "i2s_out_ao";
status = "disabled"; };
}; };
i2c_AO: i2c@500 { i2s_out_lr_clk_pins: i2s_out_lr_clk {
compatible = "amlogic,meson-gxbb-i2c"; mux {
reg = <0x0 0x500 0x0 0x20>; groups = "i2s_out_lr_clk";
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; function = "i2s_out_ao";
clocks = <&clkc CLKID_AO_I2C>; };
#address-cells = <1>; };
#size-cells = <0>;
status = "disabled"; i2s_out_ch01_ao_pins: i2s_out_ch01_ao {
mux {
groups = "i2s_out_ch01_ao";
function = "i2s_out_ao";
};
};
i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
mux {
groups = "i2s_out_ch23_ao";
function = "i2s_out_ao";
};
};
i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
mux {
groups = "i2s_out_ch45_ao";
function = "i2s_out_ao";
};
};
spdif_out_ao_6_pins: spdif_out_ao_6 {
mux {
groups = "spdif_out_ao_6";
function = "spdif_out_ao";
};
};
spdif_out_ao_13_pins: spdif_out_ao_13 {
mux {
groups = "spdif_out_ao_13";
function = "spdif_out_ao";
};
};
}; };
}; };
...@@ -245,6 +267,7 @@ gpio: bank@4b0 { ...@@ -245,6 +267,7 @@ gpio: bank@4b0 {
reg-names = "mux", "pull", "pull-enable", "gpio"; reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pinctrl_periphs 0 14 120>;
}; };
emmc_pins: emmc { emmc_pins: emmc {
...@@ -467,6 +490,34 @@ mux { ...@@ -467,6 +490,34 @@ mux {
function = "hdmi_i2c"; function = "hdmi_i2c";
}; };
}; };
i2sout_ch23_y_pins: i2sout_ch23_y {
mux {
groups = "i2sout_ch23_y";
function = "i2s_out";
};
};
i2sout_ch45_y_pins: i2sout_ch45_y {
mux {
groups = "i2sout_ch45_y";
function = "i2s_out";
};
};
i2sout_ch67_y_pins: i2sout_ch67_y {
mux {
groups = "i2sout_ch67_y";
function = "i2s_out";
};
};
spdif_out_y_pins: spdif_out_y {
mux {
groups = "spdif_out_y";
function = "spdif_out";
};
};
}; };
}; };
...@@ -478,10 +529,51 @@ clkc: clock-controller@0 { ...@@ -478,10 +529,51 @@ clkc: clock-controller@0 {
}; };
}; };
&apb {
mali: gpu@c0000 {
compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
reg = <0x0 0xc0000 0x0 0x40000>;
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp", "gpmmu", "pp", "pmu",
"pp0", "ppmmu0", "pp1", "ppmmu1",
"pp2", "ppmmu2";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
clock-names = "bus", "core";
/*
* Mali clocking is provided by two identical clock paths
* MALI_0 and MALI_1 muxed to a single clock by a glitch
* free mux to safely change frequency while running.
*/
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
<&clkc CLKID_MALI_0>,
<&clkc CLKID_MALI>; /* Glitch free mux */
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
<0>, /* Do Nothing */
<&clkc CLKID_MALI_0>;
assigned-clock-rates = <0>, /* Do Nothing */
<666666666>,
<0>; /* Do Nothing */
};
};
&i2c_A { &i2c_A {
clocks = <&clkc CLKID_I2C>; clocks = <&clkc CLKID_I2C>;
}; };
&i2c_AO {
clocks = <&clkc CLKID_AO_I2C>;
};
&i2c_B { &i2c_B {
clocks = <&clkc CLKID_I2C>; clocks = <&clkc CLKID_I2C>;
}; };
...@@ -521,6 +613,22 @@ &sd_emmc_c { ...@@ -521,6 +613,22 @@ &sd_emmc_c {
clock-names = "core", "clkin0", "clkin1"; clock-names = "core", "clkin0", "clkin1";
}; };
&spifc {
clocks = <&clkc CLKID_SPI>;
};
&vpu { &vpu {
compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
}; };
&hdmi_tx {
compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
resets = <&reset RESET_HDMITX_CAPB3>,
<&reset RESET_HDMI_SYSTEM_RESET>,
<&reset RESET_HDMI_TX>;
reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci";
};
/*
* Copyright (c) 2017 BayLibre SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
&apb {
mali: gpu@c0000 {
compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
reg = <0x0 0xc0000 0x0 0x40000>;
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp", "gpmmu", "pp", "pmu",
"pp0", "ppmmu0", "pp1", "ppmmu1",
"pp2", "ppmmu2";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
clock-names = "bus", "core";
/*
* Mali clocking is provided by two identical clock paths
* MALI_0 and MALI_1 muxed to a single clock by a glitch
* free mux to safely change frequency while running.
*/
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
<&clkc CLKID_MALI_0>,
<&clkc CLKID_MALI>; /* Glitch free mux */
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
<0>, /* Do Nothing */
<&clkc CLKID_MALI_0>;
assigned-clock-rates = <0>, /* Do Nothing */
<666666666>,
<0>; /* Do Nothing */
};
};
...@@ -43,12 +43,47 @@ ...@@ -43,12 +43,47 @@
/dts-v1/; /dts-v1/;
#include <dt-bindings/input/input.h>
#include "meson-gxl-s905d.dtsi" #include "meson-gxl-s905d.dtsi"
#include "meson-gx-p23x-q20x.dtsi" #include "meson-gx-p23x-q20x.dtsi"
/ { / {
compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl"; compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl";
model = "Amlogic Meson GXL (S905D) P230 Development Board"; model = "Amlogic Meson GXL (S905D) P230 Development Board";
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1710000>;
button-function {
label = "Update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <10000>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
button@0 {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
};
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
}; };
/* P230 has exclusive choice between internal or external PHY */ /* P230 has exclusive choice between internal or external PHY */
...@@ -59,6 +94,8 @@ &ethmac { ...@@ -59,6 +94,8 @@ &ethmac {
/* Select external PHY by default */ /* Select external PHY by default */
phy-handle = <&external_phy>; phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
/* External PHY reset is shared with internal PHY Led signals */ /* External PHY reset is shared with internal PHY Led signals */
snps,reset-gpio = <&gpio GPIOZ_14 0>; snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>; snps,reset-delays-us = <0 10000 1000000>;
...@@ -75,3 +112,8 @@ external_phy: ethernet-phy@0 { ...@@ -75,3 +112,8 @@ external_phy: ethernet-phy@0 {
max-speed = <1000>; max-speed = <1000>;
}; };
}; };
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
*/ */
#include "meson-gxl.dtsi" #include "meson-gxl.dtsi"
#include "meson-gxl-mali.dtsi"
/ { / {
compatible = "amlogic,s905d", "amlogic,meson-gxl"; compatible = "amlogic,s905d", "amlogic,meson-gxl";
......
/*
* Copyright (c) 2017 Carlo Caione
* Copyright (c) 2016 BayLibre, Inc.
* Author: Neil Armstrong <narmstrong@kernel.org>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/dts-v1/;
#include "meson-gxl-s905x.dtsi"
/ {
compatible = "hwacom,amazetv", "amlogic,s905x", "amlogic,meson-gxl";
model = "Hwacom AmazeTV (S905X)";
aliases {
serial0 = &uart_AO;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
vddio_card: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "VDDIO_CARD";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
/* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */
states = <1800000 0
3300000 1>;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
status = "okay";
phy-mode = "rmii";
phy-handle = <&internal_phy>;
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-names = "default";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_card>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>;
pinctrl-names = "default";
bus-width = <8>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <100000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vddio_boot>;
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
/*
* Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "meson-gxl-s905x-p212.dtsi"
/ {
compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
model = "Khadas VIM";
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1710000>;
button-function {
label = "Function";
linux,code = <KEY_FN>;
press-threshold-microvolt = <10000>;
};
};
aliases {
serial2 = &uart_AO_B;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
button@0 {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
};
};
pwmleds {
compatible = "pwm-leds";
power {
label = "vim:red:power";
pwms = <&pwm_AO_ab 1 7812500 0>;
max-brightness = <255>;
linux,default-trigger = "default-on";
};
};
};
&i2c_A {
status = "okay";
pinctrl-0 = <&i2c_a_pins>;
pinctrl-names = "default";
};
&i2c_B {
status = "okay";
pinctrl-0 = <&i2c_b_pins>;
pinctrl-names = "default";
rtc: rtc@51 {
/* has to be enabled manually when a battery is connected: */
status = "disabled";
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "xin32k";
};
};
&ir {
linux,rc-map-name = "rc-geekbox";
};
&pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
};
&sd_emmc_a {
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
&uart_AO {
status = "okay";
};
/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
&uart_AO_B {
status = "okay";
pinctrl-0 = <&uart_ao_b_pins>;
pinctrl-names = "default";
};
...@@ -127,6 +127,17 @@ cvbs_connector_in: endpoint { ...@@ -127,6 +127,17 @@ cvbs_connector_in: endpoint {
}; };
}; };
}; };
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
}; };
&uart_AO { &uart_AO {
...@@ -219,3 +230,15 @@ cvbs_vdac_out: endpoint { ...@@ -219,3 +230,15 @@ cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>; remote-endpoint = <&cvbs_connector_in>;
}; };
}; };
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
...@@ -43,23 +43,26 @@ ...@@ -43,23 +43,26 @@
/dts-v1/; /dts-v1/;
#include "meson-gxl-s905x.dtsi" #include "meson-gxl-s905x-p212.dtsi"
/ { / {
compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl"; compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl";
model = "Amlogic Meson GXL (S905X) P212 Development Board"; model = "Amlogic Meson GXL (S905X) P212 Development Board";
aliases { cvbs-connector {
serial0 = &uart_AO; compatible = "composite-video-connector";
};
chosen { port {
stdout-path = "serial0:115200n8"; cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
}; };
};
memory@0 { &cvbs_vdac_port {
device_type = "memory"; cvbs_vdac_out: endpoint {
reg = <0x0 0x0 0x0 0x80000000>; remote-endpoint = <&cvbs_connector_in>;
}; };
}; };
......
/*
* Copyright (c) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
* Based on meson-gx-p23x-q20x.dtsi:
* - Copyright (c) 2016 Endless Computers, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
* - Copyright (c) 2016 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/* Common DTSI for devices which are based on the P212 reference board. */
#include "meson-gxl-s905x.dtsi"
/ {
aliases {
serial0 = &uart_AO;
serial1 = &uart_A;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
};
&ethmac {
status = "okay";
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};
/* Wireless SDIO Module */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
non-removable;
disable-wp;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-names = "default";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>;
pinctrl-names = "default";
bus-width = <8>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vddio_boot>;
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* This is connected to the Bluetooth module: */
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
*/ */
#include "meson-gxl.dtsi" #include "meson-gxl.dtsi"
#include "meson-gxl-mali.dtsi"
/ { / {
compatible = "amlogic,s905x", "amlogic,meson-gxl"; compatible = "amlogic,s905x", "amlogic,meson-gxl";
......
...@@ -44,6 +44,7 @@ ...@@ -44,6 +44,7 @@
#include "meson-gx.dtsi" #include "meson-gx.dtsi"
#include <dt-bindings/clock/gxbb-clkc.h> #include <dt-bindings/clock/gxbb-clkc.h>
#include <dt-bindings/gpio/meson-gxl-gpio.h> #include <dt-bindings/gpio/meson-gxl-gpio.h>
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
/ { / {
compatible = "amlogic,meson-gxl"; compatible = "amlogic,meson-gxl";
...@@ -79,6 +80,7 @@ gpio_ao: bank@14 { ...@@ -79,6 +80,7 @@ gpio_ao: bank@14 {
reg-names = "mux", "pull", "gpio"; reg-names = "mux", "pull", "gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pinctrl_aobus 0 0 14>;
}; };
uart_ao_a_pins: uart_ao_a { uart_ao_a_pins: uart_ao_a {
...@@ -103,6 +105,13 @@ mux { ...@@ -103,6 +105,13 @@ mux {
}; };
}; };
uart_ao_b_0_1_pins: uart_ao_b_0_1 {
mux {
groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1";
function = "uart_ao_b";
};
};
uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
mux { mux {
groups = "uart_cts_ao_b", groups = "uart_cts_ao_b",
...@@ -118,12 +127,69 @@ mux { ...@@ -118,12 +127,69 @@ mux {
}; };
}; };
i2c_ao_pins: i2c_ao {
mux {
groups = "i2c_sck_ao",
"i2c_sda_ao";
function = "i2c_ao";
};
};
pwm_ao_a_3_pins: pwm_ao_a_3 {
mux {
groups = "pwm_ao_a_3";
function = "pwm_ao_a";
};
};
pwm_ao_a_8_pins: pwm_ao_a_8 {
mux {
groups = "pwm_ao_a_8";
function = "pwm_ao_a";
};
};
pwm_ao_b_pins: pwm_ao_b { pwm_ao_b_pins: pwm_ao_b {
mux { mux {
groups = "pwm_ao_b"; groups = "pwm_ao_b";
function = "pwm_ao_b"; function = "pwm_ao_b";
}; };
}; };
pwm_ao_b_6_pins: pwm_ao_b_6 {
mux {
groups = "pwm_ao_b_6";
function = "pwm_ao_b";
};
};
i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
mux {
groups = "i2s_out_ch23_ao";
function = "i2s_out_ao";
};
};
i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
mux {
groups = "i2s_out_ch45_ao";
function = "i2s_out_ao";
};
};
spdif_out_ao_6_pins: spdif_out_ao_6 {
mux {
groups = "spdif_out_ao_6";
function = "spdif_out_ao";
};
};
spdif_out_ao_9_pins: spdif_out_ao_9 {
mux {
groups = "spdif_out_ao_9";
function = "spdif_out_ao";
};
};
}; };
}; };
...@@ -142,6 +208,7 @@ gpio: bank@4b0 { ...@@ -142,6 +208,7 @@ gpio: bank@4b0 {
reg-names = "mux", "pull", "pull-enable", "gpio"; reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pinctrl_periphs 0 14 101>;
}; };
emmc_pins: emmc { emmc_pins: emmc {
...@@ -154,6 +221,16 @@ mux { ...@@ -154,6 +221,16 @@ mux {
}; };
}; };
nor_pins: nor {
mux {
groups = "nor_d",
"nor_q",
"nor_c",
"nor_cs";
function = "nor";
};
};
sdcard_pins: sdcard { sdcard_pins: sdcard {
mux { mux {
groups = "sdcard_d0", groups = "sdcard_d0",
...@@ -277,6 +354,34 @@ mux { ...@@ -277,6 +354,34 @@ mux {
}; };
}; };
pwm_a_pins: pwm_a {
mux {
groups = "pwm_a";
function = "pwm_a";
};
};
pwm_b_pins: pwm_b {
mux {
groups = "pwm_b";
function = "pwm_b";
};
};
pwm_c_pins: pwm_c {
mux {
groups = "pwm_c";
function = "pwm_c";
};
};
pwm_d_pins: pwm_d {
mux {
groups = "pwm_d";
function = "pwm_d";
};
};
pwm_e_pins: pwm_e { pwm_e_pins: pwm_e {
mux { mux {
groups = "pwm_e"; groups = "pwm_e";
...@@ -284,6 +389,20 @@ mux { ...@@ -284,6 +389,20 @@ mux {
}; };
}; };
pwm_f_clk_pins: pwm_f_clk {
mux {
groups = "pwm_f_clk";
function = "pwm_f";
};
};
pwm_f_x_pins: pwm_f_x {
mux {
groups = "pwm_f_x";
function = "pwm_f";
};
};
hdmi_hpd_pins: hdmi_hpd { hdmi_hpd_pins: hdmi_hpd {
mux { mux {
groups = "hdmi_hpd"; groups = "hdmi_hpd";
...@@ -297,6 +416,61 @@ mux { ...@@ -297,6 +416,61 @@ mux {
function = "hdmi_i2c"; function = "hdmi_i2c";
}; };
}; };
i2s_am_clk_pins: i2s_am_clk {
mux {
groups = "i2s_am_clk";
function = "i2s_out";
};
};
i2s_out_ao_clk_pins: i2s_out_ao_clk {
mux {
groups = "i2s_out_ao_clk";
function = "i2s_out";
};
};
i2s_out_lr_clk_pins: i2s_out_lr_clk {
mux {
groups = "i2s_out_lr_clk";
function = "i2s_out";
};
};
i2s_out_ch01_pins: i2s_out_ch01 {
mux {
groups = "i2s_out_ch01";
function = "i2s_out";
};
};
i2sout_ch23_z_pins: i2sout_ch23_z {
mux {
groups = "i2sout_ch23_z";
function = "i2s_out";
};
};
i2sout_ch45_z_pins: i2sout_ch45_z {
mux {
groups = "i2sout_ch45_z";
function = "i2s_out";
};
};
i2sout_ch67_z_pins: i2sout_ch67_z {
mux {
groups = "i2sout_ch67_z";
function = "i2s_out";
};
};
spdif_out_h_pins: spdif_out_ao_h {
mux {
groups = "spdif_out_h";
function = "spdif_out";
};
};
}; };
eth-phy-mux { eth-phy-mux {
...@@ -339,6 +513,10 @@ &i2c_A { ...@@ -339,6 +513,10 @@ &i2c_A {
clocks = <&clkc CLKID_I2C>; clocks = <&clkc CLKID_I2C>;
}; };
&i2c_AO {
clocks = <&clkc CLKID_AO_I2C>;
};
&i2c_B { &i2c_B {
clocks = <&clkc CLKID_I2C>; clocks = <&clkc CLKID_I2C>;
}; };
...@@ -378,6 +556,22 @@ &sd_emmc_c { ...@@ -378,6 +556,22 @@ &sd_emmc_c {
clock-names = "core", "clkin0", "clkin1"; clock-names = "core", "clkin0", "clkin1";
}; };
&spifc {
clocks = <&clkc CLKID_SPI>;
};
&vpu { &vpu {
compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
}; };
&hdmi_tx {
compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
resets = <&reset RESET_HDMITX_CAPB3>,
<&reset RESET_HDMI_SYSTEM_RESET>,
<&reset RESET_HDMI_TX>;
reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci";
};
...@@ -100,6 +100,17 @@ cvbs_connector_in: endpoint { ...@@ -100,6 +100,17 @@ cvbs_connector_in: endpoint {
}; };
}; };
}; };
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
}; };
/* This UART is brought out to the DB9 connector */ /* This UART is brought out to the DB9 connector */
...@@ -162,6 +173,8 @@ &ethmac { ...@@ -162,6 +173,8 @@ &ethmac {
/* Select external PHY by default */ /* Select external PHY by default */
phy-handle = <&external_phy>; phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>; snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>; snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low; snps,reset-active-low;
...@@ -183,3 +196,15 @@ cvbs_vdac_out: endpoint { ...@@ -183,3 +196,15 @@ cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>; remote-endpoint = <&cvbs_connector_in>;
}; };
}; };
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
...@@ -43,12 +43,47 @@ ...@@ -43,12 +43,47 @@
/dts-v1/; /dts-v1/;
#include <dt-bindings/input/input.h>
#include "meson-gxm.dtsi" #include "meson-gxm.dtsi"
#include "meson-gx-p23x-q20x.dtsi" #include "meson-gx-p23x-q20x.dtsi"
/ { / {
compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm"; compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm";
model = "Amlogic Meson GXM (S912) Q200 Development Board"; model = "Amlogic Meson GXM (S912) Q200 Development Board";
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1710000>;
button-function {
label = "Update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <10000>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
button@0 {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
};
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
}; };
/* Q200 has exclusive choice between internal or external PHY */ /* Q200 has exclusive choice between internal or external PHY */
...@@ -59,6 +94,8 @@ &ethmac { ...@@ -59,6 +94,8 @@ &ethmac {
/* Select external PHY by default */ /* Select external PHY by default */
phy-handle = <&external_phy>; phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
/* External PHY reset is shared with internal PHY Led signals */ /* External PHY reset is shared with internal PHY Led signals */
snps,reset-gpio = <&gpio GPIOZ_14 0>; snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>; snps,reset-delays-us = <0 10000 1000000>;
...@@ -75,3 +112,8 @@ external_phy: ethernet-phy@0 { ...@@ -75,3 +112,8 @@ external_phy: ethernet-phy@0 {
max-speed = <1000>; max-speed = <1000>;
}; };
}; };
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};
...@@ -130,3 +130,6 @@ &vpu { ...@@ -130,3 +130,6 @@ &vpu {
compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
}; };
&hdmi_tx {
compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
};
...@@ -177,7 +177,7 @@ ...@@ -177,7 +177,7 @@
/* CLKID_FCLK_DIV4 */ /* CLKID_FCLK_DIV4 */
#define CLKID_FCLK_DIV5 7 #define CLKID_FCLK_DIV5 7
#define CLKID_FCLK_DIV7 8 #define CLKID_FCLK_DIV7 8
#define CLKID_GP0_PLL 9 /* CLKID_GP0_PLL */
#define CLKID_MPEG_SEL 10 #define CLKID_MPEG_SEL 10
#define CLKID_MPEG_DIV 11 #define CLKID_MPEG_DIV 11
/* CLKID_CLK81 */ /* CLKID_CLK81 */
...@@ -206,16 +206,16 @@ ...@@ -206,16 +206,16 @@
#define CLKID_I2S_SPDIF 35 #define CLKID_I2S_SPDIF 35
/* CLKID_ETH */ /* CLKID_ETH */
#define CLKID_DEMUX 37 #define CLKID_DEMUX 37
#define CLKID_AIU_GLUE 38 /* CLKID_AIU_GLUE */
#define CLKID_IEC958 39 #define CLKID_IEC958 39
#define CLKID_I2S_OUT 40 /* CLKID_I2S_OUT */
#define CLKID_AMCLK 41 #define CLKID_AMCLK 41
#define CLKID_AIFIFO2 42 #define CLKID_AIFIFO2 42
#define CLKID_MIXER 43 #define CLKID_MIXER 43
#define CLKID_MIXER_IFACE 44 /* CLKID_MIXER_IFACE */
#define CLKID_ADC 45 #define CLKID_ADC 45
#define CLKID_BLKMV 46 #define CLKID_BLKMV 46
#define CLKID_AIU 47 /* CLKID_AIU */
#define CLKID_UART1 48 #define CLKID_UART1 48
#define CLKID_G2D 49 #define CLKID_G2D 49
/* CLKID_USB0 */ /* CLKID_USB0 */
...@@ -248,7 +248,7 @@ ...@@ -248,7 +248,7 @@
/* CLKID_GCLK_VENCI_INT0 */ /* CLKID_GCLK_VENCI_INT0 */
#define CLKID_GCLK_VENCI_INT 78 #define CLKID_GCLK_VENCI_INT 78
#define CLKID_DAC_CLK 79 #define CLKID_DAC_CLK 79
#define CLKID_AOCLK_GATE 80 /* CLKID_AOCLK_GATE */
#define CLKID_IEC958_GATE 81 #define CLKID_IEC958_GATE 81
#define CLKID_ENC480P 82 #define CLKID_ENC480P 82
#define CLKID_RNG1 83 #define CLKID_RNG1 83
...@@ -268,8 +268,15 @@ ...@@ -268,8 +268,15 @@
/* CLKID_SAR_ADC_CLK */ /* CLKID_SAR_ADC_CLK */
/* CLKID_SAR_ADC_SEL */ /* CLKID_SAR_ADC_SEL */
#define CLKID_SAR_ADC_DIV 99 #define CLKID_SAR_ADC_DIV 99
/* CLKID_MALI_0_SEL */
#define CLKID_MALI_0_DIV 101
/* CLKID_MALI_0 */
/* CLKID_MALI_1_SEL */
#define CLKID_MALI_1_DIV 104
/* CLKID_MALI_1 */
/* CLKID_MALI */
#define NR_CLKS 100 #define NR_CLKS 107
/* include the CLKIDs that have been made part of the stable DT binding */ /* include the CLKIDs that have been made part of the stable DT binding */
#include <dt-bindings/clock/gxbb-clkc.h> #include <dt-bindings/clock/gxbb-clkc.h>
......
...@@ -10,12 +10,17 @@ ...@@ -10,12 +10,17 @@
#define CLKID_FCLK_DIV2 4 #define CLKID_FCLK_DIV2 4
#define CLKID_FCLK_DIV3 5 #define CLKID_FCLK_DIV3 5
#define CLKID_FCLK_DIV4 6 #define CLKID_FCLK_DIV4 6
#define CLKID_GP0_PLL 9
#define CLKID_CLK81 12 #define CLKID_CLK81 12
#define CLKID_MPLL2 15 #define CLKID_MPLL2 15
#define CLKID_SPI 34 #define CLKID_SPI 34
#define CLKID_I2C 22 #define CLKID_I2C 22
#define CLKID_SAR_ADC 23 #define CLKID_SAR_ADC 23
#define CLKID_ETH 36 #define CLKID_ETH 36
#define CLKID_AIU_GLUE 38
#define CLKID_I2S_OUT 40
#define CLKID_MIXER_IFACE 44
#define CLKID_AIU 47
#define CLKID_USB0 50 #define CLKID_USB0 50
#define CLKID_USB1 51 #define CLKID_USB1 51
#define CLKID_USB 55 #define CLKID_USB 55
...@@ -24,11 +29,17 @@ ...@@ -24,11 +29,17 @@
#define CLKID_USB0_DDR_BRIDGE 65 #define CLKID_USB0_DDR_BRIDGE 65
#define CLKID_SANA 69 #define CLKID_SANA 69
#define CLKID_GCLK_VENCI_INT0 77 #define CLKID_GCLK_VENCI_INT0 77
#define CLKID_AOCLK_GATE 80
#define CLKID_AO_I2C 93 #define CLKID_AO_I2C 93
#define CLKID_SD_EMMC_A 94 #define CLKID_SD_EMMC_A 94
#define CLKID_SD_EMMC_B 95 #define CLKID_SD_EMMC_B 95
#define CLKID_SD_EMMC_C 96 #define CLKID_SD_EMMC_C 96
#define CLKID_SAR_ADC_CLK 97 #define CLKID_SAR_ADC_CLK 97
#define CLKID_SAR_ADC_SEL 98 #define CLKID_SAR_ADC_SEL 98
#define CLKID_MALI_0_SEL 100
#define CLKID_MALI_0 102
#define CLKID_MALI_1_SEL 103
#define CLKID_MALI_1 105
#define CLKID_MALI 106
#endif /* __GXBB_CLKC_H */ #endif /* __GXBB_CLKC_H */
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