Commit def0641e authored by Stefan Agner's avatar Stefan Agner Committed by Shawn Guo

ARM: dts: add property for maximum ADC clock frequencies

The ADC clock frequency is limited depending on modes used. Add
device tree property which allow to set the mode used and the
maximum frequency ratings for the instance. These allows to
set the ADC clock to a frequency which is within specification
according to the actual mode used.
Acked-by: default avatarFugang Duan <B38611@freescale.com>
Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent abb9f253
...@@ -228,6 +228,8 @@ adc0: adc@4003b000 { ...@@ -228,6 +228,8 @@ adc0: adc@4003b000 {
clock-names = "adc"; clock-names = "adc";
#io-channel-cells = <1>; #io-channel-cells = <1>;
status = "disabled"; status = "disabled";
fsl,adck-max-frequency = <30000000>, <40000000>,
<20000000>;
}; };
wdoga5: wdog@4003e000 { wdoga5: wdog@4003e000 {
...@@ -470,6 +472,8 @@ esdhc0: esdhc@400b1000 { ...@@ -470,6 +472,8 @@ esdhc0: esdhc@400b1000 {
<&clks VF610_CLK_ESDHC0>; <&clks VF610_CLK_ESDHC0>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
status = "disabled"; status = "disabled";
fsl,adck-max-frequency = <30000000>, <40000000>,
<20000000>;
}; };
esdhc1: esdhc@400b2000 { esdhc1: esdhc@400b2000 {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment