Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
nexedi
linux
Commits
e04558cb
Commit
e04558cb
authored
Jun 23, 2016
by
Jason Cooper
Browse files
Options
Browse Files
Download
Plain Diff
Merge branch 'irqchip/misc' into irqchip/core
parents
d7e3528e
35333285
Changes
11
Hide whitespace changes
Inline
Side-by-side
Showing
11 changed files
with
51 additions
and
42 deletions
+51
-42
drivers/irqchip/exynos-combiner.c
drivers/irqchip/exynos-combiner.c
+7
-7
drivers/irqchip/irq-armada-370-xp.c
drivers/irqchip/irq-armada-370-xp.c
+1
-1
drivers/irqchip/irq-bcm2836.c
drivers/irqchip/irq-bcm2836.c
+2
-2
drivers/irqchip/irq-bcm7120-l2.c
drivers/irqchip/irq-bcm7120-l2.c
+5
-5
drivers/irqchip/irq-brcmstb-l2.c
drivers/irqchip/irq-brcmstb-l2.c
+2
-2
drivers/irqchip/irq-gic-v2m.c
drivers/irqchip/irq-gic-v2m.c
+1
-0
drivers/irqchip/irq-omap-intc.c
drivers/irqchip/irq-omap-intc.c
+2
-0
drivers/irqchip/irq-s3c24xx.c
drivers/irqchip/irq-s3c24xx.c
+18
-18
drivers/irqchip/irq-sirfsoc.c
drivers/irqchip/irq-sirfsoc.c
+8
-3
drivers/irqchip/irq-tegra.c
drivers/irqchip/irq-tegra.c
+2
-2
drivers/irqchip/irq-vic.c
drivers/irqchip/irq-vic.c
+3
-2
No files found.
drivers/irqchip/exynos-combiner.c
View file @
e04558cb
...
...
@@ -55,14 +55,14 @@ static void combiner_mask_irq(struct irq_data *data)
{
u32
mask
=
1
<<
(
data
->
hwirq
%
32
);
__raw_writel
(
mask
,
combiner_base
(
data
)
+
COMBINER_ENABLE_CLEAR
);
writel_relaxed
(
mask
,
combiner_base
(
data
)
+
COMBINER_ENABLE_CLEAR
);
}
static
void
combiner_unmask_irq
(
struct
irq_data
*
data
)
{
u32
mask
=
1
<<
(
data
->
hwirq
%
32
);
__raw_writel
(
mask
,
combiner_base
(
data
)
+
COMBINER_ENABLE_SET
);
writel_relaxed
(
mask
,
combiner_base
(
data
)
+
COMBINER_ENABLE_SET
);
}
static
void
combiner_handle_cascade_irq
(
struct
irq_desc
*
desc
)
...
...
@@ -75,7 +75,7 @@ static void combiner_handle_cascade_irq(struct irq_desc *desc)
chained_irq_enter
(
chip
,
desc
);
spin_lock
(
&
irq_controller_lock
);
status
=
__raw_readl
(
chip_data
->
base
+
COMBINER_INT_STATUS
);
status
=
readl_relaxed
(
chip_data
->
base
+
COMBINER_INT_STATUS
);
spin_unlock
(
&
irq_controller_lock
);
status
&=
chip_data
->
irq_mask
;
...
...
@@ -135,7 +135,7 @@ static void __init combiner_init_one(struct combiner_chip_data *combiner_data,
combiner_data
->
parent_irq
=
irq
;
/* Disable all interrupts */
__raw_writel
(
combiner_data
->
irq_mask
,
base
+
COMBINER_ENABLE_CLEAR
);
writel_relaxed
(
combiner_data
->
irq_mask
,
base
+
COMBINER_ENABLE_CLEAR
);
}
static
int
combiner_irq_domain_xlate
(
struct
irq_domain
*
d
,
...
...
@@ -218,7 +218,7 @@ static int combiner_suspend(void)
for
(
i
=
0
;
i
<
max_nr
;
i
++
)
combiner_data
[
i
].
pm_save
=
__raw_readl
(
combiner_data
[
i
].
base
+
COMBINER_ENABLE_SET
);
readl_relaxed
(
combiner_data
[
i
].
base
+
COMBINER_ENABLE_SET
);
return
0
;
}
...
...
@@ -235,9 +235,9 @@ static void combiner_resume(void)
int
i
;
for
(
i
=
0
;
i
<
max_nr
;
i
++
)
{
__raw_writel
(
combiner_data
[
i
].
irq_mask
,
writel_relaxed
(
combiner_data
[
i
].
irq_mask
,
combiner_data
[
i
].
base
+
COMBINER_ENABLE_CLEAR
);
__raw_writel
(
combiner_data
[
i
].
pm_save
,
writel_relaxed
(
combiner_data
[
i
].
pm_save
,
combiner_data
[
i
].
base
+
COMBINER_ENABLE_SET
);
}
}
...
...
drivers/irqchip/irq-armada-370-xp.c
View file @
e04558cb
...
...
@@ -541,7 +541,7 @@ static void armada_370_xp_mpic_resume(void)
writel
(
1
,
per_cpu_int_base
+
ARMADA_370_XP_INT_CLEAR_MASK_OFFS
);
}
struct
syscore_ops
armada_370_xp_mpic_syscore_ops
=
{
st
atic
st
ruct
syscore_ops
armada_370_xp_mpic_syscore_ops
=
{
.
suspend
=
armada_370_xp_mpic_suspend
,
.
resume
=
armada_370_xp_mpic_resume
,
};
...
...
drivers/irqchip/irq-bcm2836.c
View file @
e04558cb
...
...
@@ -224,8 +224,8 @@ static struct notifier_block bcm2836_arm_irqchip_cpu_notifier = {
};
#ifdef CONFIG_ARM
int
__init
bcm2836_smp_boot_secondary
(
unsigned
int
cpu
,
struct
task_struct
*
idle
)
static
int
__init
bcm2836_smp_boot_secondary
(
unsigned
int
cpu
,
struct
task_struct
*
idle
)
{
unsigned
long
secondary_startup_phys
=
(
unsigned
long
)
virt_to_phys
((
void
*
)
secondary_startup
);
...
...
drivers/irqchip/irq-bcm7120-l2.c
View file @
e04558cb
...
...
@@ -215,7 +215,7 @@ static int __init bcm7120_l2_intc_iomap_3380(struct device_node *dn,
return
0
;
}
int
__init
bcm7120_l2_intc_probe
(
struct
device_node
*
dn
,
static
int
__init
bcm7120_l2_intc_probe
(
struct
device_node
*
dn
,
struct
device_node
*
parent
,
int
(
*
iomap_regs_fn
)(
struct
device_node
*
,
struct
bcm7120_l2_intc_data
*
),
...
...
@@ -339,15 +339,15 @@ int __init bcm7120_l2_intc_probe(struct device_node *dn,
return
ret
;
}
int
__init
bcm7120_l2_intc_probe_7120
(
struct
device_node
*
dn
,
struct
device_node
*
parent
)
static
int
__init
bcm7120_l2_intc_probe_7120
(
struct
device_node
*
dn
,
struct
device_node
*
parent
)
{
return
bcm7120_l2_intc_probe
(
dn
,
parent
,
bcm7120_l2_intc_iomap_7120
,
"BCM7120 L2"
);
}
int
__init
bcm7120_l2_intc_probe_3380
(
struct
device_node
*
dn
,
struct
device_node
*
parent
)
static
int
__init
bcm7120_l2_intc_probe_3380
(
struct
device_node
*
dn
,
struct
device_node
*
parent
)
{
return
bcm7120_l2_intc_probe
(
dn
,
parent
,
bcm7120_l2_intc_iomap_3380
,
"BCM3380 L2"
);
...
...
drivers/irqchip/irq-brcmstb-l2.c
View file @
e04558cb
...
...
@@ -112,8 +112,8 @@ static void brcmstb_l2_intc_resume(struct irq_data *d)
irq_gc_unlock
(
gc
);
}
int
__init
brcmstb_l2_intc_of_init
(
struct
device_node
*
np
,
struct
device_node
*
parent
)
static
int
__init
brcmstb_l2_intc_of_init
(
struct
device_node
*
np
,
struct
device_node
*
parent
)
{
unsigned
int
clr
=
IRQ_NOREQUEST
|
IRQ_NOPROBE
|
IRQ_NOAUTOEN
;
struct
brcmstb_l2_intc_data
*
data
;
...
...
drivers/irqchip/irq-gic-v2m.c
View file @
e04558cb
...
...
@@ -24,6 +24,7 @@
#include <linux/of_pci.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/irqchip/arm-gic.h>
/*
* MSI_TYPER:
...
...
drivers/irqchip/irq-omap-intc.c
View file @
e04558cb
...
...
@@ -23,6 +23,8 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/irqchip/irq-omap-intc.h>
/* Define these here for now until we drop all board-files */
#define OMAP24XX_IC_BASE 0x480fe000
#define OMAP34XX_IC_BASE 0x48200000
...
...
drivers/irqchip/irq-s3c24xx.c
View file @
e04558cb
...
...
@@ -92,9 +92,9 @@ static void s3c_irq_mask(struct irq_data *data)
unsigned
long
mask
;
unsigned
int
irqno
;
mask
=
__raw_readl
(
intc
->
reg_mask
);
mask
=
readl_relaxed
(
intc
->
reg_mask
);
mask
|=
(
1UL
<<
irq_data
->
offset
);
__raw_writel
(
mask
,
intc
->
reg_mask
);
writel_relaxed
(
mask
,
intc
->
reg_mask
);
if
(
parent_intc
)
{
parent_data
=
&
parent_intc
->
irqs
[
irq_data
->
parent_irq
];
...
...
@@ -119,9 +119,9 @@ static void s3c_irq_unmask(struct irq_data *data)
unsigned
long
mask
;
unsigned
int
irqno
;
mask
=
__raw_readl
(
intc
->
reg_mask
);
mask
=
readl_relaxed
(
intc
->
reg_mask
);
mask
&=
~
(
1UL
<<
irq_data
->
offset
);
__raw_writel
(
mask
,
intc
->
reg_mask
);
writel_relaxed
(
mask
,
intc
->
reg_mask
);
if
(
parent_intc
)
{
irqno
=
irq_find_mapping
(
parent_intc
->
domain
,
...
...
@@ -136,9 +136,9 @@ static inline void s3c_irq_ack(struct irq_data *data)
struct
s3c_irq_intc
*
intc
=
irq_data
->
intc
;
unsigned
long
bitval
=
1UL
<<
irq_data
->
offset
;
__raw_writel
(
bitval
,
intc
->
reg_pending
);
writel_relaxed
(
bitval
,
intc
->
reg_pending
);
if
(
intc
->
reg_intpnd
)
__raw_writel
(
bitval
,
intc
->
reg_intpnd
);
writel_relaxed
(
bitval
,
intc
->
reg_intpnd
);
}
static
int
s3c_irq_type
(
struct
irq_data
*
data
,
unsigned
int
type
)
...
...
@@ -172,9 +172,9 @@ static int s3c_irqext_type_set(void __iomem *gpcon_reg,
unsigned
long
newvalue
=
0
,
value
;
/* Set the GPIO to external interrupt mode */
value
=
__raw_readl
(
gpcon_reg
);
value
=
readl_relaxed
(
gpcon_reg
);
value
=
(
value
&
~
(
3
<<
gpcon_offset
))
|
(
0x02
<<
gpcon_offset
);
__raw_writel
(
value
,
gpcon_reg
);
writel_relaxed
(
value
,
gpcon_reg
);
/* Set the external interrupt to pointed trigger type */
switch
(
type
)
...
...
@@ -208,9 +208,9 @@ static int s3c_irqext_type_set(void __iomem *gpcon_reg,
return
-
EINVAL
;
}
value
=
__raw_readl
(
extint_reg
);
value
=
readl_relaxed
(
extint_reg
);
value
=
(
value
&
~
(
7
<<
extint_offset
))
|
(
newvalue
<<
extint_offset
);
__raw_writel
(
value
,
extint_reg
);
writel_relaxed
(
value
,
extint_reg
);
return
0
;
}
...
...
@@ -315,8 +315,8 @@ static void s3c_irq_demux(struct irq_desc *desc)
chained_irq_enter
(
chip
,
desc
);
src
=
__raw_readl
(
sub_intc
->
reg_pending
);
msk
=
__raw_readl
(
sub_intc
->
reg_mask
);
src
=
readl_relaxed
(
sub_intc
->
reg_pending
);
msk
=
readl_relaxed
(
sub_intc
->
reg_mask
);
src
&=
~
msk
;
src
&=
irq_data
->
sub_bits
;
...
...
@@ -337,7 +337,7 @@ static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc,
int
pnd
;
int
offset
;
pnd
=
__raw_readl
(
intc
->
reg_intpnd
);
pnd
=
readl_relaxed
(
intc
->
reg_intpnd
);
if
(
!
pnd
)
return
false
;
...
...
@@ -352,7 +352,7 @@ static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc,
*
* Thanks to Klaus, Shannon, et al for helping to debug this problem
*/
offset
=
__raw_readl
(
intc
->
reg_intpnd
+
4
);
offset
=
readl_relaxed
(
intc
->
reg_intpnd
+
4
);
/* Find the bit manually, when the offset is wrong.
* The pending register only ever contains the one bit of the next
...
...
@@ -406,7 +406,7 @@ int s3c24xx_set_fiq(unsigned int irq, bool on)
intmod
=
0
;
}
__raw_writel
(
intmod
,
S3C2410_INTMOD
);
writel_relaxed
(
intmod
,
S3C2410_INTMOD
);
return
0
;
}
...
...
@@ -508,14 +508,14 @@ static void s3c24xx_clear_intc(struct s3c_irq_intc *intc)
last
=
0
;
for
(
i
=
0
;
i
<
4
;
i
++
)
{
pend
=
__raw_readl
(
reg_source
);
pend
=
readl_relaxed
(
reg_source
);
if
(
pend
==
0
||
pend
==
last
)
break
;
__raw_writel
(
pend
,
intc
->
reg_pending
);
writel_relaxed
(
pend
,
intc
->
reg_pending
);
if
(
intc
->
reg_intpnd
)
__raw_writel
(
pend
,
intc
->
reg_intpnd
);
writel_relaxed
(
pend
,
intc
->
reg_intpnd
);
pr_info
(
"irq: clearing pending status %08x
\n
"
,
(
int
)
pend
);
last
=
pend
;
...
...
drivers/irqchip/irq-sirfsoc.c
View file @
e04558cb
...
...
@@ -29,6 +29,11 @@
static
struct
irq_domain
*
sirfsoc_irqdomain
;
static
void
__iomem
*
sirfsoc_irq_get_regbase
(
void
)
{
return
(
void
__iomem
__force
*
)
sirfsoc_irqdomain
->
host_data
;
}
static
__init
void
sirfsoc_alloc_gc
(
void
__iomem
*
base
)
{
unsigned
int
clr
=
IRQ_NOREQUEST
|
IRQ_NOPROBE
|
IRQ_NOAUTOEN
;
...
...
@@ -53,7 +58,7 @@ static __init void sirfsoc_alloc_gc(void __iomem *base)
static
void
__exception_irq_entry
sirfsoc_handle_irq
(
struct
pt_regs
*
regs
)
{
void
__iomem
*
base
=
sirfsoc_irq
domain
->
host_data
;
void
__iomem
*
base
=
sirfsoc_irq
_get_regbase
()
;
u32
irqstat
;
irqstat
=
readl_relaxed
(
base
+
SIRFSOC_INIT_IRQ_ID
);
...
...
@@ -94,7 +99,7 @@ static struct sirfsoc_irq_status sirfsoc_irq_st;
static
int
sirfsoc_irq_suspend
(
void
)
{
void
__iomem
*
base
=
sirfsoc_irq
domain
->
host_data
;
void
__iomem
*
base
=
sirfsoc_irq
_get_regbase
()
;
sirfsoc_irq_st
.
mask0
=
readl_relaxed
(
base
+
SIRFSOC_INT_RISC_MASK0
);
sirfsoc_irq_st
.
mask1
=
readl_relaxed
(
base
+
SIRFSOC_INT_RISC_MASK1
);
...
...
@@ -106,7 +111,7 @@ static int sirfsoc_irq_suspend(void)
static
void
sirfsoc_irq_resume
(
void
)
{
void
__iomem
*
base
=
sirfsoc_irq
domain
->
host_data
;
void
__iomem
*
base
=
sirfsoc_irq
_get_regbase
()
;
writel_relaxed
(
sirfsoc_irq_st
.
mask0
,
base
+
SIRFSOC_INT_RISC_MASK0
);
writel_relaxed
(
sirfsoc_irq_st
.
mask1
,
base
+
SIRFSOC_INT_RISC_MASK1
);
...
...
drivers/irqchip/irq-tegra.c
View file @
e04558cb
...
...
@@ -90,7 +90,7 @@ static struct tegra_ictlr_info *lic;
static
inline
void
tegra_ictlr_write_mask
(
struct
irq_data
*
d
,
unsigned
long
reg
)
{
void
__iomem
*
base
=
d
->
chip_data
;
void
__iomem
*
base
=
(
void
__iomem
__force
*
)
d
->
chip_data
;
u32
mask
;
mask
=
BIT
(
d
->
hwirq
%
32
);
...
...
@@ -266,7 +266,7 @@ static int tegra_ictlr_domain_alloc(struct irq_domain *domain,
irq_domain_set_hwirq_and_chip
(
domain
,
virq
+
i
,
hwirq
+
i
,
&
tegra_ictlr_chip
,
info
->
base
[
ictlr
]);
(
void
__force
*
)
info
->
base
[
ictlr
]);
}
parent_fwspec
=
*
fwspec
;
...
...
drivers/irqchip/irq-vic.c
View file @
e04558cb
...
...
@@ -167,7 +167,7 @@ static int vic_suspend(void)
return
0
;
}
struct
syscore_ops
vic_syscore_ops
=
{
st
atic
st
ruct
syscore_ops
vic_syscore_ops
=
{
.
suspend
=
vic_suspend
,
.
resume
=
vic_resume
,
};
...
...
@@ -517,7 +517,8 @@ int __init vic_init_cascaded(void __iomem *base, unsigned int parent_irq,
EXPORT_SYMBOL_GPL
(
vic_init_cascaded
);
#ifdef CONFIG_OF
int
__init
vic_of_init
(
struct
device_node
*
node
,
struct
device_node
*
parent
)
static
int
__init
vic_of_init
(
struct
device_node
*
node
,
struct
device_node
*
parent
)
{
void
__iomem
*
regs
;
u32
interrupt_mask
=
~
0
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment